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[Qemu-commits] [qemu/qemu] 7d6b1d: linux-user, ppc: mftbl can be used by
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[Qemu-commits] [qemu/qemu] 7d6b1d: linux-user, ppc: mftbl can be used by user applica... |
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Tue, 07 Jul 2015 15:30:04 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 7d6b1daedd00b35e50ce87ea835f662b36a23160
https://github.com/qemu/qemu/commit/7d6b1daedd00b35e50ce87ea835f662b36a23160
Author: Laurent Vivier <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M linux-user/main.c
Log Message:
-----------
linux-user, ppc: mftbl can be used by user application
In qemu-linux-user, when calling gethostbyname2(),
it was hanging in .__res_nmkquery.
(gdb) bt
0 in .__res_nmkquery () from /lib64/libresolv.so.2
1 in .__libc_res_nquery () from /lib64/libresolv.so.2
2 in .__libc_res_nsearch () from /lib64/libresolv.so.2
3 in ._nss_dns_gethostbyname3_r () from /lib64/libnss_dns.so.2
4 in ._nss_dns_gethostbyname2_r () from /lib64/libnss_dns.so.2
5 in .gethostbyname2_r () from /lib64/libc.so.6
6 in .gethostbyname2 () from /lib64/libc.so.6
.__res_nmkquery() is:
...
do { RANDOM_BITS (randombits); } while ((randombits & 0xffff) == 0);
...
<.__res_nmkquery+112>: mftbl r11
<.__res_nmkquery+116>: clrlwi r10,r11,16
<.__res_nmkquery+120>: cmpwi cr7,r10,0
<.__res_nmkquery+124>: beq cr7,<.__res_nmkquery+112>
but as mftbl (Move From Time Base Lower) is not implemented,
r11 is always 0, so we have an infinite loop.
This patch fills the Time Base register with cpu_get_real_ticks().
Signed-off-by: Laurent Vivier <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 5c464f66f5696724c892339de242fac41f4d57a6
https://github.com/qemu/qemu/commit/5c464f66f5696724c892339de242fac41f4d57a6
Author: Cormac O'Brien <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/misc/macio/macio.c
Log Message:
-----------
macio: remove nonexistent interrupt on pin 1
The current macio implementation declares an interrupt that doesn't appear to
exist in the hardware or any other emulator implementation. OpenBIOS detects
this interrupt and generates an 'interrupts' property in the macio device tree
entry. Mac OS 9 halts boot when it detects this interrupt, so it has been
removed to permit further progress in the boot process.
Signed-off-by: Cormac O'Brien <address@hidden>
Reviewed-by: Mark Cave-Ayland <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 2d103aae876518a91636ad6f4a4d866269c0d953
https://github.com/qemu/qemu/commit/2d103aae876518a91636ad6f4a4d866269c0d953
Author: Michael Roth <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M target-ppc/kvm.c
Log Message:
-----------
target-ppc: fix hugepage support when using memory-backend-file
Current PPC code relies on -mem-path being used in order for
hugepage support to be detected. With the introduction of
MemoryBackendFile we can now handle this via:
-object memory-file-backend,mem-path=...,id=hugemem0 \
-numa node,id=mem0,memdev=hugemem0
Management tools like libvirt treat the 2 approaches as
interchangeable in some cases, which can lead to user-visible
regressions even for previously supported guest configurations.
Fix these by also iterating through any configured memory
backends that may be backed by hugepages.
Since the old code assumed hugepages always backed the entirety
of guest memory, play it safe an pick the minimum across the
max pages sizes for all backends, even ones that aren't backed
by hugepages.
Signed-off-by: Michael Roth <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: f303f117fec32c0705f88860e3eadf94135211c9
https://github.com/qemu/qemu/commit/f303f117fec32c0705f88860e3eadf94135211c9
Author: Greg Kurz <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr.c
Log Message:
-----------
spapr: ensure we have at least one XICS server
XICS needs to know the upper value for cpu_index as it is used to compute
the number of servers:
smp_cpus * kvmppc_smt_threads() / smp_threads
When passing -smp cpus=1,threads=9 on a POWER8 host, we end up with:
1 * 8 / 9 = 0
... which leads to an assertion in both emulated:
Number of servers needs to be greater 0
Aborted (core dumped)
... and in-kernel XICS:
xics_kvm_realize: Assertion `icp->nr_servers' failed.
Aborted (core dumped)
With this patch, we are sure that nr_servers > 0. Passing the same bogus
-smp option then leads to:
qemu-system-ppc64: Cannot support more than 8 threads on PPC with KVM
... which is a lot more explicit than the XICS errors.
Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 780184aae65d72378737e9cdb8fb61b0121e1e21
https://github.com/qemu/qemu/commit/780184aae65d72378737e9cdb8fb61b0121e1e21
Author: Alexey Kardashevskiy <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M pc-bios/README
M pc-bios/slof.bin
M roms/SLOF
Log Message:
-----------
pseries: Update SLOF firmware image to qemu-slof-20150429
The changelog is:
> version: update to 20150429
> pci: Use QEMU created PCI device nodes
> usb: support 64-bit pci bars
> pci: Support 64-bit address translation
> pci: program correct bridge limit registers during probe
> scsi: handle report-luns failure
> Fix "key?" Forth word when using USB keyboards
> Remove bulk.fs package
> Include make.rules in the library Makefiles
Signed-off-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 28e0204254c3f03e77106056a3a5730c4b8a2ac6
https://github.com/qemu/qemu/commit/28e0204254c3f03e77106056a3a5730c4b8a2ac6
Author: David Gibson <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/char/spapr_vty.c
M hw/intc/xics.c
M hw/intc/xics_kvm.c
M hw/net/spapr_llan.c
M hw/nvram/spapr_nvram.c
M hw/ppc/spapr.c
M hw/ppc/spapr_events.c
M hw/ppc/spapr_hcall.c
M hw/ppc/spapr_iommu.c
M hw/ppc/spapr_pci.c
M hw/ppc/spapr_rtas.c
M hw/ppc/spapr_rtc.c
M hw/ppc/spapr_vio.c
M include/hw/pci-host/spapr.h
M include/hw/ppc/spapr.h
M include/hw/ppc/spapr_vio.h
Log Message:
-----------
spapr: Merge sPAPREnvironment into sPAPRMachineState
The code for -machine pseries maintains a global sPAPREnvironment structure
which keeps track of general state information about the guest platform.
This predates the existence of the MachineState structure, but performs
basically the same function.
Now that we have the generic MachineState, fold sPAPREnvironment into
sPAPRMachineState, the pseries specific subclass of MachineState.
This is mostly a matter of search and replace, although a few places which
relied on the global spapr variable are changed to find the structure via
qdev_get_machine().
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: fb16499418aa7d71d2a4f2e3d79de444c4d054c0
https://github.com/qemu/qemu/commit/fb16499418aa7d71d2a4f2e3d79de444c4d054c0
Author: David Gibson <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr.c
M hw/ppc/spapr_hcall.c
M include/hw/ppc/spapr.h
Log Message:
-----------
spapr: Remove obsolete ram_limit field from sPAPRMachineState
The ram_limit field was imported from sPAPREnvironment where it predates
the machine's ram size being available generically from machine->ram_size.
Worse, the existing code was inconsistent about where it got the ram size
from. Sometimes it used spapr->ram_limit, sometimes the global 'ram_size'
and sometimes a local 'ram_size' masking the global.
This cleans up the code to consistently use machine->ram_size, eliminating
spapr->ram_limit in the process.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 1b71890729953825c57d52ace48a7671c295e899
https://github.com/qemu/qemu/commit/1b71890729953825c57d52ace48a7671c295e899
Author: David Gibson <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr.c
M include/hw/ppc/spapr.h
Log Message:
-----------
spapr: Remove obsolete entry_point field from sPAPRMachineState
The sPAPRMachineState structure includes an entry_point field containing
the initial PC value for starting the machine, even though this always has
the value 0x100.
I think this is a hangover from very early versions which bypassed the
firmware when using -kernel. In any case it has no function now, so remove
it.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 183930c0d753e53d22c27d573b1803b04f8d68ac
https://github.com/qemu/qemu/commit/183930c0d753e53d22c27d573b1803b04f8d68ac
Author: David Gibson <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr.c
M include/hw/ppc/spapr.h
Log Message:
-----------
spapr: Add sPAPRMachineClass
Currently although we have an sPAPRMachineState descended from MachineState
we don't have an sPAPRMAchineClass descended from MachineClass. So far it
hasn't been needed, but several upcoming features are going to want it,
so this patch creates a stub implementation.
Signed-off-by: Michael Roth <address@hidden>
Signed-off-by: Bharata B Rao <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 72187935b475454792512d44782a33f112b120e6
https://github.com/qemu/qemu/commit/72187935b475454792512d44782a33f112b120e6
Author: Nikunj A Dadhania <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr_pci.c
Log Message:
-----------
spapr_pci: encode missing 64-bit memory address space
The properties reg/assigned-resources need to encode 64-bit memory
address space as part of phys.hi dword.
00 if configuration space
01 if IO region,
10 if 32-bit MEM region
11 if 64-bit MEM region
Signed-off-by: Nikunj A Dadhania <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 4a7c34741584e91aa838a9e45b8ec5cdc65a343b
https://github.com/qemu/qemu/commit/4a7c34741584e91aa838a9e45b8ec5cdc65a343b
Author: Nikunj A Dadhania <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr_pci.c
Log Message:
-----------
spapr_pci: encode class code including Prog IF register
Current code missed the Prog IF register. All Class Code, Subclass,
and Prog IF registers are needed to identify the accurate device type.
For example: USB controllers use the PROG IF for denoting: USB
FullSpeed, HighSpeed or SuperSpeed.
Signed-off-by: Nikunj A Dadhania <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 9b7d9284c3b114112a7759ce0a885df0767fe8d9
https://github.com/qemu/qemu/commit/9b7d9284c3b114112a7759ce0a885df0767fe8d9
Author: Nikunj A Dadhania <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr_pci.c
Log Message:
-----------
spapr_pci: set device node unit address as hex
Device node names should encode the unit address as hex, while the
code was encodind it as integers.
Also, use FDT_NAME_MAX macro for allocating and composing the name.
Signed-off-by: Nikunj A Dadhania <address@hidden>
Reviewed-by: Thomas Huth <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 4d9ab7d4ed46c63d047862d11946996005742a09
https://github.com/qemu/qemu/commit/4d9ab7d4ed46c63d047862d11946996005742a09
Author: Greg Kurz <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr_iommu.c
Log Message:
-----------
spapr_iommu: drop erroneous check in h_put_tce_indirect()
The tce_list variable is not a TCE but the address to a TCE: we shouldn't
clear permission bits as we do now. And this is dead code anyway since we
check tce_list is 4K aligned a few lines above.
This patch doesn't fix any bug, it is only code cleanup.
Suggested-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 5709af3b9520c6912fc909128ae284512b127600
https://github.com/qemu/qemu/commit/5709af3b9520c6912fc909128ae284512b127600
Author: Greg Kurz <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr_iommu.c
Log Message:
-----------
spapr_iommu: translate sPAPRTCEAccess to IOMMUAccessFlags
The fact that these enums have matching values is pure coincidence. We
actually need to translate from the PAPR definition to the QEMU one.
This patch doesn't fix any bug, it is only code cleanup.
Suggested-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 708414f03c3bebbd7ba8e4e98fb92602d2af8d0c
https://github.com/qemu/qemu/commit/708414f03c3bebbd7ba8e4e98fb92602d2af8d0c
Author: Markus Armbruster <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr_pci.c
Log Message:
-----------
Revert "hw/ppc/spapr_pci.c: Avoid functions not in glib 2.12
(g_hash_table_iter_*)"
Since we now require GLib 2.22+ (commit f40685c), we don't have to
work around lack of g_hash_table_iter_init() & friends anymore.
This reverts commit f8833a37c0c6b22ddd57b45e48cfb0f97dbd5af4.
Signed-off-by: Markus Armbruster <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 9e734e3deefd460188ea9bd107b65a528ccb7255
https://github.com/qemu/qemu/commit/9e734e3deefd460188ea9bd107b65a528ccb7255
Author: Bharata B Rao <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr.c
Log Message:
-----------
spapr: Consider max_cpus during xics initialization
Use max_cpus instead of smp_cpus when intializating xics system. Also
report max_cpus in ibm,interrupt-server-ranges device tree property of
interrupt controller node.
Signed-off-by: Bharata B Rao <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: db4ef288f4a6d285b39dc8ac477092d76971a300
https://github.com/qemu/qemu/commit/db4ef288f4a6d285b39dc8ac477092d76971a300
Author: Bharata B Rao <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M docs/specs/ppc-spapr-hotplug.txt
M hw/ppc/spapr_rtas.c
M include/hw/ppc/spapr.h
Log Message:
-----------
spapr: Support ibm, lrdr-capacity device tree property
Add support for ibm,lrdr-capacity since this is needed by the guest
kernel to know about the possible hot-pluggable CPUs and Memory. With
this, pseries kernels will start reporting correct maxcpus in
/sys/devices/system/cpu/possible.
Also define the minimum hotpluggable memory size as 256MB.
Signed-off-by: Bharata B Rao <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
[agraf: Fix compile error on 32bit hosts]
Signed-off-by: Alexander Graf <address@hidden>
Commit: 8487d1231830917099c801e4f2f0e698e8535063
https://github.com/qemu/qemu/commit/8487d1231830917099c801e4f2f0e698e8535063
Author: Bharata B Rao <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M include/qom/cpu.h
Log Message:
-----------
cpus: Add a macro to walk CPUs in reverse
Add CPU_FOREACH_REVERSE that walks CPUs in reverse.
Needed for PowerPC CPU device tree reorganization.
Signed-off-by: Bharata B Rao <address@hidden>
Reviewed-by: Andreas Färber <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 0da6f3fef9ae52127c14dfad1fdf1781e33ec5ec
https://github.com/qemu/qemu/commit/0da6f3fef9ae52127c14dfad1fdf1781e33ec5ec
Author: Bharata B Rao <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr.c
Log Message:
-----------
spapr: Reorganize CPU dt generation code
Reorganize CPU device tree generation code so that it be reused from
hotplug path. CPU dt entries are now generated from spapr_finalize_fdt()
instead of spapr_create_fdt_skel().
Note: This is how the split-up looks like now:
Boot path
---------
spapr_finalize_fdt
spapr_populate_cpus_dt_node
spapr_populate_cpu_dt
spapr_fixup_cpu_numa_dt
spapr_fixup_cpu_smt_dt
ibm,cas path
------------
spapr_h_cas_compose_response
spapr_fixup_cpu_dt
spapr_fixup_cpu_numa_dt
spapr_fixup_cpu_smt_dt
Signed-off-by: Bharata B Rao <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: bab99ea09897fb65255cc4e147d87c077fafcfe6
https://github.com/qemu/qemu/commit/bab99ea09897fb65255cc4e147d87c077fafcfe6
Author: Bharata B Rao <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr.c
Log Message:
-----------
spapr: Consolidate cpu init code into a routine
Factor out bits of sPAPR specific CPU initialization code into
a separate routine so that it can be called from CPU hotplug
path too.
Signed-off-by: Bharata B Rao <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 19fb2c36e2475a2c68e7287e0e089d858dd7cc50
https://github.com/qemu/qemu/commit/19fb2c36e2475a2c68e7287e0e089d858dd7cc50
Author: Bharata B Rao <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/mac_newworld.c
M hw/ppc/mac_oldworld.c
M hw/ppc/ppc440_bamboo.c
M hw/ppc/prep.c
M hw/ppc/spapr.c
M hw/ppc/virtex_ml507.c
Log Message:
-----------
ppc: Update cpu_model in MachineState
Keep cpu_model field in MachineState uptodate so that it can be used
from the CPU hotplug path.
Signed-off-by: Bharata B Rao <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: a45863bda90daa8ec39e5a312b9734fd4665b016
https://github.com/qemu/qemu/commit/a45863bda90daa8ec39e5a312b9734fd4665b016
Author: Bharata B Rao <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/intc/xics_kvm.c
M include/hw/ppc/xics.h
Log Message:
-----------
xics_kvm: Don't enable KVM_CAP_IRQ_XICS if already enabled
When supporting CPU hot removal by parking the vCPU fd and reusing
it during hotplug again, there can be cases where we try to reenable
KVM_CAP_IRQ_XICS CAP for the vCPU for which it was already enabled.
Introduce a boolean member in ICPState to track this and don't
reenable the CAP if it was already enabled earlier.
Re-enabling this CAP should ideally work, but currently it results in
kernel trying to create and associate ICP with this vCPU and that
fails since there is already an ICP associated with it. Hence this
patch is needed to work around this problem in the kernel.
This change allows CPU hot removal to work for sPAPR.
Signed-off-by: Bharata B Rao <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 1d2d974244c6f1629ca83f1de293eaa557634627
https://github.com/qemu/qemu/commit/1d2d974244c6f1629ca83f1de293eaa557634627
Author: Nikunj A Dadhania <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr_pci.c
Log Message:
-----------
spapr_pci: enumerate and add PCI device tree
All the PCI enumeration and device node creation was off-loaded to
SLOF. With PCI hotplug support, code needed to be added to add device
node. This creates multiple copy of the code one in SLOF and other in
hotplug code. To unify this, the patch adds the pci device node
creation in Qemu. For backward compatibility, a flag
"qemu,phb-enumerated" is added to the phb, suggesting to SLOF to not
do device node creation.
Signed-off-by: Nikunj A Dadhania <address@hidden>
[ Squashed Michael's drc_index changes ]
Signed-off-by: Michael Roth <address@hidden>
Signed-off-by: Nikunj A Dadhania <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 16b0ea1d852873cf17630133d86df6a68e23f38c
https://github.com/qemu/qemu/commit/16b0ea1d852873cf17630133d86df6a68e23f38c
Author: Nikunj A Dadhania <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr_pci.c
Log Message:
-----------
spapr_pci: populate ibm,loc-code
Each hardware instance has a platform unique location code. The OF
device tree that describes a part of a hardware entity must include
the “ibm,loc-code” property with a value that represents the location
code for that hardware entity.
Populate ibm,loc-code.
1) PCI passthru devices need to identify with its own ibm,loc-code
available on the host. In failure cases use:
vfio_<name>:<phb-index>:<bus>:<slot>.<fn>
2) Emulated devices encode as following:
qemu_<name>:<phb-index>:<bus>:<slot>.<fn>
Signed-off-by: Nikunj A Dadhania <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: e634b89c6ed2309814de7a89bd7c5ced96f59291
https://github.com/qemu/qemu/commit/e634b89c6ed2309814de7a89bd7c5ced96f59291
Author: Nikunj A Dadhania <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr_pci.c
Log Message:
-----------
spapr_pci: drop redundant args in spapr_[populate, create]_pci_child_dt
* phb_index is not being used and if required can be obtained from sphb
* use helper to get drc_index in spapr_populate_pci_child_dt()
* Check if drc_index is zero
Suggested-by: Alexey Kardashevskiy <address@hidden>
Signed-off-by: Nikunj A Dadhania <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 0f888bfaddfc5f55b0d82cde2e1164658a672375
https://github.com/qemu/qemu/commit/0f888bfaddfc5f55b0d82cde2e1164658a672375
Author: David Gibson <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/char/spapr_vty.c
Log Message:
-----------
spapr_vty: lookup should only return valid VTY objects
If a guest passes the reg property of a valid VIO object that is not a VTY
to either H_GET_TERM_CHAR or H_PUT_TERM_CHAR, QEMU hits a dynamic cast
assertion and aborts.
PAPR+ says "Hypervisor checks the termno parameter for validity against the
Vterm IOA unit addresses assigned to the partition, else return H_Parameter."
This patch adds a type check to ensure vty_lookup() either returns a pointer
to a valid VTY object or NULL. H_GET_TERM_CHAR and H_PUT_TERM_CHAR will
now return H_PARAMETER to the guest instead of crashing.
The patch has no effect on the reg == 0 hack used to implement the RTAS call
display-character.
Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: e275934d2dd44e38e0c6d53f9c22383d2ba57c17
https://github.com/qemu/qemu/commit/e275934d2dd44e38e0c6d53f9c22383d2ba57c17
Author: David Gibson <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/char/spapr_vty.c
Log Message:
-----------
spapr-vty: Use TYPE_ definition instead of hardcoding
There's a call to object_dynamic_cast() in spapr_vty which uses the type
name "spapr-vty" directly, instead of the usual idiom of using the #defined
TYPE_VIO_SPAPR_VTY_DEVICE. Fix it.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 7cb180079e245024cf92ca218ca58858b679a7d6
https://github.com/qemu/qemu/commit/7cb180079e245024cf92ca218ca58858b679a7d6
Author: Gavin Shan <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr_pci.c
Log Message:
-----------
sPAPR: Don't enable EEH on emulated PCI devices
There might have emulated PCI devices, together with VFIO PCI
devices under one PHB. The EEH capability shouldn't enabled
on emulated PCI devices.
The patch returns error when enabling EEH capability on emulated
PCI devices by RTAS call "ibm,set-eeh-option".
Signed-off-by: Gavin Shan <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: aef87d1b879416909a4ac73e6fe2cea4a5630f40
https://github.com/qemu/qemu/commit/aef87d1b879416909a4ac73e6fe2cea4a5630f40
Author: Gavin Shan <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr_pci_vfio.c
Log Message:
-----------
sPAPR: Reenable EEH functionality on reboot
When rebooting the guest, some PEs might be in frozen state. The
contained PCI devices won't work properly if their frozen states
aren't cleared in time. One case running into this situation would
be maximal EEH error times encountered in the guest.
The patch reenables the EEH functinality on PEs on PHB's reset
callback, which will clear their frozen states if needed.
Signed-off-by: Gavin Shan <address@hidden>
Reviewed-by: David Gibson <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 6319b1dad04e66f450fb3ac6c31d2bf3940068b8
https://github.com/qemu/qemu/commit/6319b1dad04e66f450fb3ac6c31d2bf3940068b8
Author: Gavin Shan <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M hw/ppc/spapr_pci_vfio.c
Log Message:
-----------
sPAPR: Clear stale MSIx table during EEH reset
The PCI device MSIx table is cleaned out in hardware after EEH PE
reset. However, we still hold the stale MSIx entries in QEMU, which
should be cleared accordingly. Otherwise, we will run into another
(recursive) EEH error and the PCI devices contained in the PE have
to be offlined exceptionally.
The patch introduces function spapr_phb_vfio_eeh_pre_reset(), which
is called by sPAPR when asserting hot or fundamental reset, to clear
stale MSIx table for VFIO PCI devices before EEH PE reset so that
MSIx table could be restored properly after EEH PE reset.
Signed-off-by: Gavin Shan <address@hidden>
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
Commit: 7ce0f7dc87e50ebf58ac756ff6be17ec97d3ba4e
https://github.com/qemu/qemu/commit/7ce0f7dc87e50ebf58ac756ff6be17ec97d3ba4e
Author: Peter Maydell <address@hidden>
Date: 2015-07-07 (Tue, 07 Jul 2015)
Changed paths:
M docs/specs/ppc-spapr-hotplug.txt
M hw/char/spapr_vty.c
M hw/intc/xics.c
M hw/intc/xics_kvm.c
M hw/misc/macio/macio.c
M hw/net/spapr_llan.c
M hw/nvram/spapr_nvram.c
M hw/ppc/mac_newworld.c
M hw/ppc/mac_oldworld.c
M hw/ppc/ppc440_bamboo.c
M hw/ppc/prep.c
M hw/ppc/spapr.c
M hw/ppc/spapr_events.c
M hw/ppc/spapr_hcall.c
M hw/ppc/spapr_iommu.c
M hw/ppc/spapr_pci.c
M hw/ppc/spapr_pci_vfio.c
M hw/ppc/spapr_rtas.c
M hw/ppc/spapr_rtc.c
M hw/ppc/spapr_vio.c
M hw/ppc/virtex_ml507.c
M include/hw/pci-host/spapr.h
M include/hw/ppc/spapr.h
M include/hw/ppc/spapr_vio.h
M include/hw/ppc/xics.h
M include/qom/cpu.h
M linux-user/main.c
M pc-bios/README
M pc-bios/slof.bin
M roms/SLOF
M target-ppc/kvm.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/agraf/tags/signed-ppc-for-upstream'
into staging
Patch queue for ppc - 2015-07-07
A few last minute PPC changes for 2.4:
- spapr: Update SLOF
- spapr: Fix a few bugs
- spapr: Preparation for hotplug
- spapr: Minor code cleanups
- linux-user: Add mftb handling
- kvm: Enable hugepage support with memory-backend-file
- mac99: Remove nonexistent interrupt pin (Mac OS 9 fix)
# gpg: Signature made Tue Jul 7 16:48:41 2015 BST using RSA key ID 03FEDC60
# gpg: Good signature from "Alexander Graf <address@hidden>"
# gpg: aka "Alexander Graf <address@hidden>"
* remotes/agraf/tags/signed-ppc-for-upstream: (30 commits)
sPAPR: Clear stale MSIx table during EEH reset
sPAPR: Reenable EEH functionality on reboot
sPAPR: Don't enable EEH on emulated PCI devices
spapr-vty: Use TYPE_ definition instead of hardcoding
spapr_vty: lookup should only return valid VTY objects
spapr_pci: drop redundant args in spapr_[populate, create]_pci_child_dt
spapr_pci: populate ibm,loc-code
spapr_pci: enumerate and add PCI device tree
xics_kvm: Don't enable KVM_CAP_IRQ_XICS if already enabled
ppc: Update cpu_model in MachineState
spapr: Consolidate cpu init code into a routine
spapr: Reorganize CPU dt generation code
cpus: Add a macro to walk CPUs in reverse
spapr: Support ibm, lrdr-capacity device tree property
spapr: Consider max_cpus during xics initialization
Revert "hw/ppc/spapr_pci.c: Avoid functions not in glib 2.12
(g_hash_table_iter_*)"
spapr_iommu: translate sPAPRTCEAccess to IOMMUAccessFlags
spapr_iommu: drop erroneous check in h_put_tce_indirect()
spapr_pci: set device node unit address as hex
spapr_pci: encode class code including Prog IF register
...
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/1a632032d1ea...7ce0f7dc87e5
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