[Qemu-commits] [qemu/qemu] 3e6848: target-i386: Set "check=off" by default on pc-*-2....

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 3e68482224129c3ddc061af7c9d438b882ecfdd1
      
https://github.com/qemu/qemu/commit/3e68482224129c3ddc061af7c9d438b882ecfdd1
  Author: Eduardo Habkost <address@hidden>
  Date:   2015-11-05 (Thu, 05 Nov 2015)

  Changed paths:
    M include/hw/i386/pc.h

  Log Message:
  -----------
  target-i386: Set "check=off" by default on pc-*-2.4 and older

The default CPU model (qemu64) have some issues today: it enables some
features (ABM and SSE4a) that are not present in many host CPUs. That
means many hosts (but not all of them) had those features silently
disabled in the default configuration in QEMU 2.4 and older.

With the new "check=on" default, this causes warnings to be printed in
the default configuration, because of the lack of SSE4A on all Intel
hosts, and the lack of ABM on Sandy Bridge and older hosts:

  $ qemu-system-x86_64 -machine pc,accel=kvm
  warning: host doesn't support requested feature: CPUID.80000001H:ECX.abm [bit 
5]
  warning: host doesn't support requested feature: CPUID.80000001H:ECX.sse4a 
[bit 6]

Those issues will be fixed in pc-*-2.5 and newer. But as we can't change
the guest ABI in pc-*-2.4, disable "check" mode by default in pc-*-2.4
and older so we don't print spurious warnings.

Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 0909ad24b2769368716c85f79fbb995dbb7041a9
      
https://github.com/qemu/qemu/commit/0909ad24b2769368716c85f79fbb995dbb7041a9
  Author: Eduardo Habkost <address@hidden>
  Date:   2015-11-05 (Thu, 05 Nov 2015)

  Changed paths:
    M include/hw/i386/pc.h
    M target-i386/cpu.c

  Log Message:
  -----------
  target-i386: Remove SSE4a from qemu64 CPU model

SSE4a is not available in any Intel CPU, and we want to make the default
CPU runnable in most hosts, so it doesn't make sense to enable it by
default in KVM mode.

We should eventually have all features supported by TCG enabled by
default in TCG mode, but as we don't have a good mechanism today to
ensure we have different defaults in KVM and TCG mode, disable SSE4a in
the qemu64 CPU model entirely.

Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 711956722c6764336f8b78a2106e57c55f02f36d
      
https://github.com/qemu/qemu/commit/711956722c6764336f8b78a2106e57c55f02f36d
  Author: Eduardo Habkost <address@hidden>
  Date:   2015-11-05 (Thu, 05 Nov 2015)

  Changed paths:
    M include/hw/i386/pc.h
    M target-i386/cpu.c

  Log Message:
  -----------
  target-i386: Remove ABM from qemu64 CPU model

ABM is not available on Sandy Bridge and older, and we want to make the
default CPU runnable in most hosts, so it won't be enabled by default in
KVM mode.

We should eventually have all features supported by TCG enabled by
default in TCG mode, but as we don't have a good mechanism today to
ensure we have different defaults in KVM and TCG mode, disable ABM in
the qemu64 CPU model entirely.

Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 6aa91e4a0237ddcebb85e3a95e166f3b3cfa42ae
      
https://github.com/qemu/qemu/commit/6aa91e4a0237ddcebb85e3a95e166f3b3cfa42ae
  Author: Eduardo Habkost <address@hidden>
  Date:   2015-11-05 (Thu, 05 Nov 2015)

  Changed paths:
    M include/hw/i386/pc.h
    M target-i386/cpu.c

  Log Message:
  -----------
  target-i386: Remove POPCNT from qemu64 and qemu32 CPU models

POPCNT is not available on Penryn and older and on Opteron_G2 and older,
and we want to make the default CPU runnable in most hosts, so it won't
be enabled by default in KVM mode.

We should eventually have all features supported by TCG enabled by
default in TCG mode, but as we don't have a good mechanism today to
ensure we have different defaults in KVM and TCG mode, disable POPCNT in
the qemu64 and qemu32 CPU models entirely.

Reviewed-by: Paolo Bonzini <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: f7fda280948a5e74aeb076ef346b991ecb173c56
      
https://github.com/qemu/qemu/commit/f7fda280948a5e74aeb076ef346b991ecb173c56
  Author: Xiao Guangrong <address@hidden>
  Date:   2015-11-05 (Thu, 05 Nov 2015)

  Changed paths:
    M target-i386/cpu.c
    M target-i386/cpu.h

  Log Message:
  -----------
  target-i386: Enable clflushopt/clwb/pcommit instructions

These instructions are used by NVDIMM drivers and the specification is
located at:
https://software.intel.com/sites/default/files/managed/0d/53/319433-022.pdf

There instructions are available on Skylake Server.

Signed-off-by: Xiao Guangrong <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Eduardo Habkost <address@hidden>


  Commit: 574418132355bae50e829eb7890c8ea5dcb53fd8
      
https://github.com/qemu/qemu/commit/574418132355bae50e829eb7890c8ea5dcb53fd8
  Author: Peter Maydell <address@hidden>
  Date:   2015-11-06 (Fri, 06 Nov 2015)

  Changed paths:
    M include/hw/i386/pc.h
    M target-i386/cpu.c
    M target-i386/cpu.h

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into 
staging

X86 queue, 2015-11-05

# gpg: Signature made Thu 05 Nov 2015 19:35:31 GMT using RSA key ID 984DC5A6
# gpg: Good signature from "Eduardo Habkost <address@hidden>"

* remotes/ehabkost/tags/x86-pull-request:
  target-i386: Enable clflushopt/clwb/pcommit instructions
  target-i386: Remove POPCNT from qemu64 and qemu32 CPU models
  target-i386: Remove ABM from qemu64 CPU model
  target-i386: Remove SSE4a from qemu64 CPU model
  target-i386: Set "check=off" by default on pc-*-2.4 and older

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/496c1b19facc...574418132355