[Qemu-commits] [qemu/qemu] 755026: target-arm: correct CNTFRQ access rig

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[Qemu-commits] [qemu/qemu] 755026: target-arm: correct CNTFRQ access rig

From:	GitHub
Subject:	[Qemu-commits] [qemu/qemu] 755026: target-arm: correct CNTFRQ access rights
Date:	Thu, 18 Feb 2016 08:00:08 -0800
  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 755026728abb19fba70e6b4396a27fa2e7550d74
      
https://github.com/qemu/qemu/commit/755026728abb19fba70e6b4396a27fa2e7550d74
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/cpu.h
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: correct CNTFRQ access rights

Correct some corner cases we were getting wrong for
CNTFRQ access rights:
 * should UNDEF from 32-bit Secure EL1
 * only writable from the highest implemented exception level,
   which might not be EL1 now

To clarify the code, provide a new utility function
arm_highest_el() which returns the highest implemented
exception level.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: f096e92b6385fd87e8ea948ad3af70faf752c13a
      
https://github.com/qemu/qemu/commit/f096e92b6385fd87e8ea948ad3af70faf752c13a
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Fix handling of SCR.SMD

We weren't quite implementing the handling of SCR.SMD correctly.
The condition governing whether the SMD bit should apply only
for NS state is "is EL3 is AArch32", not "is the current EL AArch32".
Fix the condition, and clarify the comment both to reflect this and
to expand slightly on what's going on for the v7-no-Virtualization case.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: 187f678d5c28251dba2b44127e59966b14518ef7
      
https://github.com/qemu/qemu/commit/187f678d5c28251dba2b44127e59966b14518ef7
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/cpu.h
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Implement MDCR_EL3.TDOSA and MDCR_EL2.TDOSA traps

Implement the traps to EL2 and EL3 controlled by the bits
MDCR_EL2.TDOSA MDCR_EL3.TDOSA. These can configurably trap
accesses to the "powerdown debug" registers.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>


  Commit: 91b0a23865558e2ce9c2e7042d404e8bf2e4b817
      
https://github.com/qemu/qemu/commit/91b0a23865558e2ce9c2e7042d404e8bf2e4b817
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Implement MDCR_EL2.TDRA traps

Implement trapping of the "debug ROM" registers, which are controlled
by MDCR_EL2.TDRA for EL2 but by the more general MDCR_EL3.TDA for EL3.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>


  Commit: d6c8cf815171e35e0b1ef4e0cff602ab3d575747
      
https://github.com/qemu/qemu/commit/d6c8cf815171e35e0b1ef4e0cff602ab3d575747
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Implement MDCR_EL3.TDA and MDCR_EL2.TDA traps

Implement the debug register traps controlled by MDCR_EL2.TDA
and MDCR_EL3.TDA.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>


  Commit: f2cae6092767aaf418778eada15be444c23883be
      
https://github.com/qemu/qemu/commit/f2cae6092767aaf418778eada15be444c23883be
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/cpu.h
    M target-arm/helper.c
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Report correct syndrome for FPEXC32_EL2 traps

If access to FPEXC32_EL2 is trapped by CPTR_EL2.TFP or CPTR_EL3.TFP,
this should be reported with a syndrome register indicating an
FP access trap, not one indicating a system register access trap.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>


  Commit: cbc0326b6fb905f80b7cef85b24571f7ebb62077
      
https://github.com/qemu/qemu/commit/cbc0326b6fb905f80b7cef85b24571f7ebb62077
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/translate.c

  Log Message:
  -----------
  target-arm: Clean up trap/undef handling of SRS

The SRS instruction is:
 * UNDEFINED in Hyp mode
 * UNPREDICTABLE in User or System mode
 * UNPREDICTABLE if the specified mode isn't accessible
 * trapped to EL3 if EL3 is AArch64 and we are at Secure EL1

Clean up the code to handle all these cases cleanly, including
picking UNDEF as our choice of UNPREDICTABLE behaviour rather
blindly trusting the mode field passed in the instruction.
As part of this, move the check for IS_USER into gen_srs()
itself rather than having it done by the caller.

The exception is that we don't UNDEF for calls from System
mode, which need a runtime check. This will be dealt with in
the following commits.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: 72309cee482868d6c4711931c3f7e02ab9dec229
      
https://github.com/qemu/qemu/commit/72309cee482868d6c4711931c3f7e02ab9dec229
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/helper.c
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Move get/set_r13_banked() to op_helper.c

Move get/set_r13_banked() from helper.c to op_helper.c. This will
let us add exception-raising code to them, and also puts them
in the same file as get/set_user_reg(), which makes some conceptual
sense.

(The original reason for the helper.c/op_helper.c split was that
only op_helper.c had access to the CPU env pointer; this distinction
has not been true for a long time, though, and so the split is
now rather arbitrary.)

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: c766568d3604082c6fd45cbabe42c48e4861a13f
      
https://github.com/qemu/qemu/commit/c766568d3604082c6fd45cbabe42c48e4861a13f
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/helper.c
    M target-arm/internals.h

  Log Message:
  -----------
  target-arm: Move bank_number() into internals.h

Move bank_number()'s implementation into internals.h, so
it's available in the user-mode-only compile as well.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>


  Commit: d86d57d4fe683c99823f625f941eff26c07c72c3
      
https://github.com/qemu/qemu/commit/d86d57d4fe683c99823f625f941eff26c07c72c3
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/op_helper.c

  Log Message:
  -----------
  target-arm: Combine user-only and softmmu get/set_r13_banked()

The user-mode versions of get/set_r13_banked() exist just to assert
if they're ever called -- the translate time code should never
emit calls to them because SRS from user mode always UNDEF.
There's no code in the softmmu versions that can't compile in
CONFIG_USER_ONLY, and the assertion is not particularly useful,
so combine the two functions rather than having completely split
versions under ifdefs.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>


  Commit: f01377f591fe15c652f947646c4a69a7d4a71ad9
      
https://github.com/qemu/qemu/commit/f01377f591fe15c652f947646c4a69a7d4a71ad9
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/op_helper.c
    M target-arm/translate.c

  Log Message:
  -----------
  target-arm: UNDEF in the UNPREDICTABLE SRS-from-System case

Make get_r13_banked() raise an exception at runtime for the
corner case of SRS from System mode, so that we can UNDEF it;
this brings us in to line with the ARM ARM's set of permitted
CONSTRAINED UNPREDICTABLE choices.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Sergey Fedorov <address@hidden>
Reviewed-by: Edgar E. Iglesias <address@hidden>


  Commit: 4054bfa9e7986c9b7d2bf70f9e10af9647e376fc
      
https://github.com/qemu/qemu/commit/4054bfa9e7986c9b7d2bf70f9e10af9647e376fc
  Author: Alistair Francis <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/cpu-qom.h
    M target-arm/cpu.c
    M target-arm/cpu64.c
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Add the pmceid0 and pmceid1 registers

Signed-off-by: Aaron Lindsay <address@hidden>
Signed-off-by: Alistair Francis <address@hidden>
Tested-by: Nathan Rossi <address@hidden>
Message-id: address@hidden
[PMM: Use 0 for PMCEID0 values for A15 and A57 since our PMU
 does not currently implement any events.]
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 978364f12adebb4b8d90fdeb71242cb3c1405740
      
https://github.com/qemu/qemu/commit/978364f12adebb4b8d90fdeb71242cb3c1405740
  Author: Alistair Francis <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Add the pmovsclr_el0 and pmintenclr_el1 registers

Signed-off-by: Aaron Lindsay <address@hidden>
Signed-off-by: Alistair Francis <address@hidden>
Tested-by: Nathan Rossi <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 8a83ffc2dafad3499b87a736b17ab1b203fdb00b
      
https://github.com/qemu/qemu/commit/8a83ffc2dafad3499b87a736b17ab1b203fdb00b
  Author: Alistair Francis <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M target-arm/helper.c

  Log Message:
  -----------
  target-arm: Add PMUSERENR_EL0 register

The Linux kernel accesses this register early in its setup.

Signed-off-by: Christopher Covington <address@hidden>
Signed-off-by: Alistair Francis <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: b527db44ad32c9520698ff5121a614e968326900
      
https://github.com/qemu/qemu/commit/b527db44ad32c9520698ff5121a614e968326900
  Author: Wei Huang <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/gpio/pl061.c

  Log Message:
  -----------
  ARM: PL061: Clear PL061 device state after reset

Current QEMU doesn't clear PL061 state after reset. This causes a
weird issue with guest reboot via GPIO. Here is the device state
with two reboot requests:

  (PL061State fields)           data   old_in_data   istate
VM boot                         0      0             0
After 1st ACPI reboot request   8      8             8
After VM PL061 driver ACK       8      8             0
After VM reboot                 8      8             0
------------------------------------------------------------
2nd ACPI reboot request         8

In the second reboot request above, because the old_in_data field is 8,
QEMU decides that there is a pending edge IRQ already (see
pl061_update()) in input; so it doesn't raise up IRQ again. As a result
the second reboot request is lost. The correct way is to clear PL061
device state after reset.

The default reset state is found from the documents listed below. Per
Peter's suggestion that QEMU automatically calls reset function after
device initialization, this patch removes calling pl061_reset() from
pl061_initfn().

Reference:
[1] PL061 Technical Reference Manual
[2] Stellaris LM3S8962 Microcontroller Data Sheet
[3] Stellaris LM3S5P31 Microcontroller Data Sheet

Signed-off-by: Wei Huang <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c3a86b35f2bae29278b2ebb3018c51ba69697db7
      
https://github.com/qemu/qemu/commit/c3a86b35f2bae29278b2ebb3018c51ba69697db7
  Author: Wei Huang <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/gpio/pl061.c

  Log Message:
  -----------
  ARM: PL061: Cleaning field of PL061 device state

This patch removes the float_high field of PL061State, which doesn't
seem to be used anywhere. Because this changes the device state, the
version ID is also bumped up for the reason of compatiblity.

Signed-off-by: Wei Huang <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ac6de31acded883e04438d25b6ac7189d83a3444
      
https://github.com/qemu/qemu/commit/ac6de31acded883e04438d25b6ac7189d83a3444
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/sd/sdhci.c

  Log Message:
  -----------
  hw/sd/sdhci.c: Remove x-drive property

The following commits will remove support for the old sdhci-pci
command line syntax using the x-drive property:
 -device sdhci-pci,x-drive=mydrive -drive id=mydrive,[...]
and replace it with an explicit sd device:
 -device sdhci-pci -drive id=mydrive,[...] -device sd,drive=mydrive

(This is OK because x-drive is experimental.)

This commit removes the x-drive property so that old style
command lines will fail with a reasonable error message:
  -device sdhci-pci,x-drive=mydrive: Property '.x-drive' not found

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden


  Commit: 260bc9d8aa887bdd72d1b2499a9080f75b289cb4
      
https://github.com/qemu/qemu/commit/260bc9d8aa887bdd72d1b2499a9080f75b289cb4
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/sd/sd.c
    M include/hw/sd/sd.h

  Log Message:
  -----------
  hw/sd/sd.c: QOMify

Turn the SD card into a QOM device.
This conversion only changes the device itself; the various
functions which are effectively methods on the device are not
touched at this point.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden


  Commit: ba3ed0fa94ee9473ef8f454512b6ca3e10fcb885
      
https://github.com/qemu/qemu/commit/ba3ed0fa94ee9473ef8f454512b6ca3e10fcb885
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/sd/sd.c

  Log Message:
  -----------
  hw/sd/sd.c: Convert sd_reset() function into Device reset method

Convert the sd_reset() function into a proper Device reset method.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden


  Commit: c759a790b672b0c5bfc50520dcc93565b55732b3
      
https://github.com/qemu/qemu/commit/c759a790b672b0c5bfc50520dcc93565b55732b3
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/sd/Makefile.objs
    A hw/sd/core.c
    M hw/sd/sd.c
    M include/hw/sd/sd.h

  Log Message:
  -----------
  hw/sd: Add QOM bus which SD cards plug in to

Add a QOM bus for SD cards to plug in to.

Note that since sd_enable() is used only by one board and there
only as part of a broken implementation, we do not provide it in
the SDBus API (but instead add a warning comment about the old
function). Whoever converts OMAP and the nseries boards to QOM
will need to either implement the card switch properly or move
the enable hack into the OMAP MMC controller model.

In the SDBus API, the old-style use of sd_set_cb to register some
qemu_irqs for notification of card insertion and write-protect
toggling is replaced with methods in the SDBusClass which the
card calls on status changes and methods in the SDClass which
the controller can call to find out the current status. The
query methods will allow us to remove the abuse of the 'register
irqs' API by controllers in their reset methods to trigger
the card to tell them about the current status again.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden


  Commit: 40bbc194376758e8deabcb6f5bfd38bf73355a40
      
https://github.com/qemu/qemu/commit/40bbc194376758e8deabcb6f5bfd38bf73355a40
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/sd/sdhci.c
    M include/hw/sd/sdhci.h

  Log Message:
  -----------
  hw/sd/sdhci.c: Update to use SDBus APIs

Update the SDHCI code to use the new SDBus APIs.

This commit introduces the new command line options required
to connect a disk to sdhci-pci:

 -device sdhci-pci -drive id=mydrive,[...] -device sd,drive=mydrive

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden


  Commit: eb4f566bbbe195b2475e8fa5d9ed29ca56a18b02
      
https://github.com/qemu/qemu/commit/eb4f566bbbe195b2475e8fa5d9ed29ca56a18b02
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/arm/xilinx_zynq.c
    M hw/arm/xlnx-ep108.c
    M hw/arm/xlnx-zynqmp.c
    M hw/sd/sdhci.c

  Log Message:
  -----------
  sdhci_sysbus: Create SD card device in users, not the device itself

Move the creation of the SD card device from the sdhci_sysbus
device itself into the boards that create these devices.
This allows us to remove the cannot_instantiate_with_device_add
notation because we no longer call drive_get_next in the device
model.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Message-id: address@hidden


  Commit: 7a9468c92517e19037bfe2272f64f5dadaf9db15
      
https://github.com/qemu/qemu/commit/7a9468c92517e19037bfe2272f64f5dadaf9db15
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/sd/pxa2xx_mmci.c

  Log Message:
  -----------
  hw/sd/pxa2xx_mmci: convert to SysBusDevice object

Convert the pxa2xx_mmci device to be a sysbus device.

In this commit we only change the device itself, and leave
the interface to the SD card using the old non-SDBus APIs.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden


  Commit: a9563e75e4f47365dc782b8a4d8460db2bc19831
      
https://github.com/qemu/qemu/commit/a9563e75e4f47365dc782b8a4d8460db2bc19831
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/sd/pxa2xx_mmci.c

  Log Message:
  -----------
  hw/sd/pxa2xx_mmci: Update to use new SDBus APIs

Now the PXA2xx MMCI device is QOMified itself, we can
update it to use the SDBus APIs to talk to the SD card.

Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden


  Commit: 19d25e0a6d2251e334528115855062738726fff5
      
https://github.com/qemu/qemu/commit/19d25e0a6d2251e334528115855062738726fff5
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/sd/pxa2xx_mmci.c

  Log Message:
  -----------
  hw/sd/pxa2xx_mmci: Convert to VMStateDescription

Convert the pxa2xx_mmci device from manual save/load
functions to a VMStateDescription structure.

This is a migration compatibility break.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden


  Commit: 6002915e0c3a6e30dfab18606f23f3149800be18
      
https://github.com/qemu/qemu/commit/6002915e0c3a6e30dfab18606f23f3149800be18
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/sd/pxa2xx_mmci.c

  Log Message:
  -----------
  hw/sd/pxa2xx_mmci: Add reset function

Add a reset function to the pxa2xx_mmci device; previously it had
no handling for system reset at all.

Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Crosthwaite <address@hidden>
Message-id: address@hidden


  Commit: 4481bbc79d2ae6041094797243972efd08b2f6b0
      
https://github.com/qemu/qemu/commit/4481bbc79d2ae6041094797243972efd08b2f6b0
  Author: Andrew Baumann <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/sd/sd.c

  Log Message:
  -----------
  hw/sd: implement CMD23 (SET_BLOCK_COUNT) for MMC compatibility

CMD23 is optional for SD but required for MMC, and the UEFI bootloader
used for Windows on Raspberry Pi 2 issues it.

Reviewed-by: Peter Crosthwaite <address@hidden>
Signed-off-by: Andrew Baumann <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: dd26eb43337adf53d22b3fda3591e3837bc08b8c
      
https://github.com/qemu/qemu/commit/dd26eb43337adf53d22b3fda3591e3837bc08b8c
  Author: Andrew Baumann <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/sd/sd.c

  Log Message:
  -----------
  hw/sd: model a power-up delay, as a workaround for an EDK2 bug

The SD spec for ACMD41 says that a zero argument is an "inquiry"
ACMD41, which does not start initialisation and is used only for
retrieving the OCR. However, Tianocore EDK2 (UEFI) has a bug [1]: it
first sends an inquiry (zero) ACMD41. If that first request returns an
OCR value with the power up bit (0x80000000) set, it assumes the card
is ready and continues, leaving the card in the wrong state. (My
assumption is that this works on hardware, because no real card is
immediately powered up upon reset.)

This change models a delay of 0.5ms from the first ACMD41 to the power
being up. However, it also immediately sets the power on upon seeing a
non-zero (non-enquiry) ACMD41. This speeds up UEFI boot, it should
also account for guests that simply delay after card reset and then
issue an ACMD41 that they expect will succeed.

[1] 
https://github.com/tianocore/edk2/blob/master/EmbeddedPkg/Universal/MmcDxe/MmcIdentification.c#L279
(This is the loop starting with "We need to wait for the MMC or SD
card is ready")

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Andrew Baumann <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 9800ad88c8e0f150284c240fb2e2d08c3e1e02d5
      
https://github.com/qemu/qemu/commit/9800ad88c8e0f150284c240fb2e2d08c3e1e02d5
  Author: Andrew Baumann <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/sd/sd.c

  Log Message:
  -----------
  hw/sd: use guest error logging rather than fprintf to stderr

Some of these errors may be harmless (e.g. probing unimplemented
commands, or issuing CMD12 in the wrong state), and may also be quite
frequent. Spamming the standard error output isn't desirable in such
cases.

Reviewed-by: Peter Crosthwaite <address@hidden>
Signed-off-by: Andrew Baumann <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 0d175e745f91fe2177f634676c34d450fd66e518
      
https://github.com/qemu/qemu/commit/0d175e745f91fe2177f634676c34d450fd66e518
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/timer/arm_timer.c

  Log Message:
  -----------
  hw/timer: QOM'ify arm_timer (pass 1)

* assign icp_pit_init to icp_pit_info.instance_init
* split the old SysBus init function into an instance_init
  and a Device realize function
* use DeviceClass::realize instead of SysBusDeviceClass::init

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: xiaoqiang zhao <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: d712a5a2a473ca545e967d8fb07a9ed4080c98d0
      
https://github.com/qemu/qemu/commit/d712a5a2a473ca545e967d8fb07a9ed4080c98d0
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/timer/arm_timer.c

  Log Message:
  -----------
  hw/timer: QOM'ify arm_timer (pass 2)

assign DeviceClass::vmsd instead of using vmstate_register function

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: xiaoqiang zhao <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 7a53a140f067f7b65c661c33c882b80219f3bfc4
      
https://github.com/qemu/qemu/commit/7a53a140f067f7b65c661c33c882b80219f3bfc4
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/timer/exynos4210_mct.c

  Log Message:
  -----------
  hw/timer: QOM'ify exynos4210_mct

assign exynos4210_mct_init to exynos4210_mct_info.instance_init
and drop the SysBusDeviceClass::init

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: xiaoqiang zhao <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: ff6ee49511a51089d09d420bdb0272081e3ff8bf
      
https://github.com/qemu/qemu/commit/ff6ee49511a51089d09d420bdb0272081e3ff8bf
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/timer/exynos4210_pwm.c

  Log Message:
  -----------
  hw/timer: QOM'ify exynos4210_pwm

assign exynos4210_pwm_init to exynos4210_pwm_info.instance_init
and drop the SysBusDeviceClass::init

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: xiaoqiang zhao <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: c9d64639dd7a96faa57449aef2cccb228ba39397
      
https://github.com/qemu/qemu/commit/c9d64639dd7a96faa57449aef2cccb228ba39397
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/timer/exynos4210_rtc.c

  Log Message:
  -----------
  hw/timer: QOM'ify exynos4210_rtc

assign exynos4210_rtc_init to exynos4210_rtc_info.instance_init
and drop the SysBusDeviceClass::init

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: xiaoqiang zhao <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 81dcc49463aa673f6cdad0ebc24cd66f6b98764b
      
https://github.com/qemu/qemu/commit/81dcc49463aa673f6cdad0ebc24cd66f6b98764b
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/timer/pl031.c

  Log Message:
  -----------
  hw/timer: QOM'ify pl031

assign pl031_init to pl031_info.instance_init and drop the
SysBusDeviceClass::init

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: xiaoqiang zhao <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: 5d83e348e7f6499f27b6431b0d91af8dcfb06763
      
https://github.com/qemu/qemu/commit/5d83e348e7f6499f27b6431b0d91af8dcfb06763
  Author: xiaoqiang.zhao <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/timer/pxa2xx_timer.c

  Log Message:
  -----------
  hw/timer: QOM'ify pxa2xx_timer

* split the old SysBus init function into an instance_init
  and a Device realize function
* use DeviceClass::realize instead of SysBusDeviceClass::init

Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: xiaoqiang zhao <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>


  Commit: dd5e38b19d7cb07d317e1285941d8245c01da540
      
https://github.com/qemu/qemu/commit/dd5e38b19d7cb07d317e1285941d8245c01da540
  Author: Peter Maydell <address@hidden>
  Date:   2016-02-18 (Thu, 18 Feb 2016)

  Changed paths:
    M hw/arm/xilinx_zynq.c
    M hw/arm/xlnx-ep108.c
    M hw/arm/xlnx-zynqmp.c
    M hw/gpio/pl061.c
    M hw/sd/Makefile.objs
    A hw/sd/core.c
    M hw/sd/pxa2xx_mmci.c
    M hw/sd/sd.c
    M hw/sd/sdhci.c
    M hw/timer/arm_timer.c
    M hw/timer/exynos4210_mct.c
    M hw/timer/exynos4210_pwm.c
    M hw/timer/exynos4210_rtc.c
    M hw/timer/pl031.c
    M hw/timer/pxa2xx_timer.c
    M include/hw/sd/sd.h
    M include/hw/sd/sdhci.h
    M target-arm/cpu-qom.h
    M target-arm/cpu.c
    M target-arm/cpu.h
    M target-arm/cpu64.c
    M target-arm/helper.c
    M target-arm/internals.h
    M target-arm/op_helper.c
    M target-arm/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 
'remotes/pmaydell/tags/pull-target-arm-20160218-1' into staging

target-arm queue:
 * implement or fix various EL3 trap behaviour for system registers
 * clean up the trap/undef handling of the SRS instruction
 * add some missing AArch64 performance monitor system registers
 * implement reset for the PL061 GPIO device
 * QOMify sd.c and the pxa2xx_mmci device
 * SD card emulation fixes for booting Tianocore UEFI on RPi2
 * QOMify various ARM timer devices

# gpg: Signature made Thu 18 Feb 2016 15:19:31 GMT using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"
# gpg:                 aka "Peter Maydell <address@hidden>"

* remotes/pmaydell/tags/pull-target-arm-20160218-1: (36 commits)
  hw/timer: QOM'ify pxa2xx_timer
  hw/timer: QOM'ify pl031
  hw/timer: QOM'ify exynos4210_rtc
  hw/timer: QOM'ify exynos4210_pwm
  hw/timer: QOM'ify exynos4210_mct
  hw/timer: QOM'ify arm_timer (pass 2)
  hw/timer: QOM'ify arm_timer (pass 1)
  hw/sd: use guest error logging rather than fprintf to stderr
  hw/sd: model a power-up delay, as a workaround for an EDK2 bug
  hw/sd: implement CMD23 (SET_BLOCK_COUNT) for MMC compatibility
  hw/sd/pxa2xx_mmci: Add reset function
  hw/sd/pxa2xx_mmci: Convert to VMStateDescription
  hw/sd/pxa2xx_mmci: Update to use new SDBus APIs
  hw/sd/pxa2xx_mmci: convert to SysBusDevice object
  sdhci_sysbus: Create SD card device in users, not the device itself
  hw/sd/sdhci.c: Update to use SDBus APIs
  hw/sd: Add QOM bus which SD cards plug in to
  hw/sd/sd.c: Convert sd_reset() function into Device reset method
  hw/sd/sd.c: QOMify
  hw/sd/sdhci.c: Remove x-drive property
  ...

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/339b665c883b...dd5e38b19d7c
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