[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-commits] [qemu/qemu] 3651c2: armv7m: Abstract out the "load kernel
|
From: |
GitHub |
|
Subject: |
[Qemu-commits] [qemu/qemu] 3651c2: armv7m: Abstract out the "load kernel" code |
|
Date: |
Wed, 01 Mar 2017 11:30:12 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 3651c28569ba2fa8e959b89681118642162273da
https://github.com/qemu/qemu/commit/3651c28569ba2fa8e959b89681118642162273da
Author: Peter Maydell <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/arm/armv7m.c
M include/hw/arm/arm.h
Log Message:
-----------
armv7m: Abstract out the "load kernel" code
Abstract the "load kernel" code out of armv7m_init() into its own
function. This includes the registration of the CPU reset function,
to parallel how we handle this for A profile cores.
We make the function public so that boards which choose to
directly instantiate an ARMv7M device object can call it.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: 6bf436cf9d1c4ce48aabf36c5c34e0d6ea2c786d
https://github.com/qemu/qemu/commit/6bf436cf9d1c4ce48aabf36c5c34e0d6ea2c786d
Author: Peter Maydell <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/intc/armv7m_nvic.c
A include/hw/arm/armv7m_nvic.h
Log Message:
-----------
armv7m: Move NVICState struct definition into header
Move the NVICState struct definition into a header, so we can
embed it into other QOM objects like SoCs.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: 56b7c66f498cea39c6c30f4eca2129eb83baa120
https://github.com/qemu/qemu/commit/56b7c66f498cea39c6c30f4eca2129eb83baa120
Author: Peter Maydell <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/arm/armv7m.c
A include/hw/arm/armv7m.h
Log Message:
-----------
armv7m: QOMify the armv7m container
Create a proper QOM object for the armv7m container, which
holds the CPU, the NVIC and the bitband regions.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: 21e0c38fe2aa93b76a0aef967b921de8f2b19cf1
https://github.com/qemu/qemu/commit/21e0c38fe2aa93b76a0aef967b921de8f2b19cf1
Author: Peter Maydell <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/arm/armv7m.c
Log Message:
-----------
armv7m: Use QOMified armv7m object in armv7m_init()
Make the legacy armv7m_init() function use the newly QOMified
armv7m object rather than doing everything by hand.
We can return the armv7m object rather than the NVIC from
armv7m_init() because its interface to the rest of the
board (GPIOs, etc) is identical.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: 618119c2d39dc015e3bb27b69ab2000a6ae2289a
https://github.com/qemu/qemu/commit/618119c2d39dc015e3bb27b69ab2000a6ae2289a
Author: Peter Maydell <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/arm/armv7m.c
M include/hw/arm/armv7m.h
Log Message:
-----------
armv7m: Make ARMv7M object take memory region link
Make the ARMv7M object take a memory region link which it uses
to wire up the bitband rather than having them always put
themselves in the system address space.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: 98957a94ef14311efcacb443566fb3a4231b21df
https://github.com/qemu/qemu/commit/98957a94ef14311efcacb443566fb3a4231b21df
Author: Peter Maydell <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/arm/armv7m.c
M hw/intc/armv7m_nvic.c
Log Message:
-----------
armv7m: Make NVIC expose a memory region rather than mapping itself
Make the NVIC device expose a memory region for its users
to map, rather than mapping itself into the system memory
space on realize, and get the one user (the ARMv7M object)
to do this.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: f68d881c9b2acee616b3baa7cc00a94a72f518f5
https://github.com/qemu/qemu/commit/f68d881c9b2acee616b3baa7cc00a94a72f518f5
Author: Peter Maydell <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/arm/armv7m.c
M include/hw/arm/armv7m.h
Log Message:
-----------
armv7m: Make bitband device take the address space to access
Instead of the bitband device doing a cpu_physical_memory_read/write,
make it take a MemoryRegion which specifies where it should be
accessing, and use address_space_read/write to access the
corresponding AddressSpace.
Since this entails pretty much a rewrite, convert away from
old_mmio in the process.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: 743eb705608f21999356dd1bcefd4733f1c959e6
https://github.com/qemu/qemu/commit/743eb705608f21999356dd1bcefd4733f1c959e6
Author: Peter Maydell <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M default-configs/arm-softmmu.mak
M hw/intc/Makefile.objs
Log Message:
-----------
armv7m: Don't put core v7M devices under CONFIG_STELLARIS
The NVIC is a core v7M device that exists for all v7M CPUs;
put it under a CONFIG_ARM_V7M rather than hiding it under
CONFIG_STELLARIS.
(We'll use CONFIG_ARM_V7M for the SysTick device too
when we split it out of the NVIC.)
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: ff68dacbc786d76a754b2c522cf70e22887bc8a6
https://github.com/qemu/qemu/commit/ff68dacbc786d76a754b2c522cf70e22887bc8a6
Author: Peter Maydell <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/intc/armv7m_nvic.c
M hw/timer/Makefile.objs
A hw/timer/armv7m_systick.c
M hw/timer/trace-events
M include/hw/arm/armv7m_nvic.h
A include/hw/timer/armv7m_systick.h
Log Message:
-----------
armv7m: Split systick out from NVIC
The SysTick timer isn't really part of the NVIC proper;
we just modelled it that way back when we couldn't
easily have devices that only occupied a small chunk
of a memory region. Split it out into its own device.
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Reviewed-by: Alex Bennée <address@hidden>
Commit: b72e2f68567c372bfcb6febb69c4dfc004166b0d
https://github.com/qemu/qemu/commit/b72e2f68567c372bfcb6febb69c4dfc004166b0d
Author: Peter Maydell <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/arm/netduino2.c
M hw/arm/stm32f205_soc.c
M include/hw/arm/stm32f205_soc.h
Log Message:
-----------
stm32f205: Create armv7m object without using armv7m_init()
Switch the stm32f205 SoC to create the armv7m object directly
rather than via the armv7m_init() wrapper. This fits better
with the SoC model's very QOMified design.
In particular this means we can push loading the guest image
out to the top level board code where it belongs, rather
than the SoC object having a QOM property for the filename
to load.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: 8a85e0654e6e5ad5e4c9c809cdb608046d56aa5d
https://github.com/qemu/qemu/commit/8a85e0654e6e5ad5e4c9c809cdb608046d56aa5d
Author: Peter Maydell <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/arm/stm32f205_soc.c
Log Message:
-----------
stm32f205: Rename 'nvic' local to 'armv7m'
The local variable 'nvic' in stm32f205_soc_realize() no longer
holds a direct pointer to the NVIC device; it is a pointer to
the ARMv7M container object. Rename it 'armv7m' accordingly.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Alex Bennée <address@hidden>
Message-id: address@hidden
Commit: f717e6245fb0e33751d3da51c55f71ecabd51ae1
https://github.com/qemu/qemu/commit/f717e6245fb0e33751d3da51c55f71ecabd51ae1
Author: Paolo Bonzini <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M scripts/update-linux-headers.sh
Log Message:
-----------
update-linux-headers: update for 4.11
The linux-headers/asm-arm/unistd.h file has been split in three
sub-files, copy them along. However, building them requires
setting ARCH rather than SRCARCH.
SRCARCH defaults to $(ARCH) anyway; to avoid future occurrence of
the same problem use ARCH for all architectures where SRCARCH=ARCH.
Currently these are all except x86, sparc, sh and tile.
Signed-off-by: Paolo Bonzini <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 3a5eb5b4a929397d8678df9415c14c691c5ba969
https://github.com/qemu/qemu/commit/3a5eb5b4a929397d8678df9415c14c691c5ba969
Author: Paolo Bonzini <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M include/standard-headers/asm-x86/hyperv.h
M include/standard-headers/linux/input-event-codes.h
M include/standard-headers/linux/pci_regs.h
M include/standard-headers/linux/virtio_ids.h
M linux-headers/asm-arm/kvm.h
A linux-headers/asm-arm/unistd-common.h
A linux-headers/asm-arm/unistd-eabi.h
A linux-headers/asm-arm/unistd-oabi.h
M linux-headers/asm-arm/unistd.h
M linux-headers/asm-arm64/kvm.h
M linux-headers/asm-powerpc/kvm.h
M linux-headers/asm-powerpc/unistd.h
M linux-headers/asm-x86/kvm_para.h
M linux-headers/linux/kvm.h
M linux-headers/linux/kvm_para.h
M linux-headers/linux/userfaultfd.h
M linux-headers/linux/vfio.h
Log Message:
-----------
update Linux headers to 4.11
virtio_mmio.h would be deleted; I am leaving it in though it was a
mistake to add it.
Signed-off-by: Paolo Bonzini <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 6692aac41119906409dfa634ecbe3ef1634b5e5c
https://github.com/qemu/qemu/commit/6692aac41119906409dfa634ecbe3ef1634b5e5c
Author: Vijaya Kumar K <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/intc/arm_gicv3_common.c
M include/hw/intc/arm_gicv3_common.h
Log Message:
-----------
hw/intc/arm_gicv3_kvm: Add ICC_SRE_EL1 register to vmstate
To Save and Restore ICC_SRE_EL1 register introduce vmstate
subsection and load only if non-zero.
Also initialize icc_sre_el1 with to 0x7 in pre_load
function.
Signed-off-by: Vijaya Kumar K <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Eric Auger <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 367b9f527becdd20ddf116e17a3c0c2bbc486920
https://github.com/qemu/qemu/commit/367b9f527becdd20ddf116e17a3c0c2bbc486920
Author: Vijaya Kumar K <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/intc/arm_gicv3_kvm.c
M hw/intc/gicv3_internal.h
Log Message:
-----------
hw/intc/arm_gicv3_kvm: Implement get/put functions
This actually implements pre_save and post_load methods for in-kernel
vGICv3.
Signed-off-by: Pavel Fedin <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Vijaya Kumar K <address@hidden>
Message-id: address@hidden
[PMM:
* use decimal, not 0bnnn
* fixed typo in names of ICC_APR0R_EL1 and ICC_AP1R_EL1
* completely rearranged the get and put functions to read and write
the state in a natural order, rather than mixing distributor and
redistributor state together]
Signed-off-by: Vijaya Kumar K <address@hidden>
[Vijay:
* Update macro KVM_VGIC_ATTR
* Use 32 bit access for gicd and gicr
* GICD_IROUTER, GICD_TYPER, GICR_PROPBASER and GICR_PENDBASER reg
access are changed from 64-bit to 32-bit access
* Add ICC_SRE_EL1 save and restore
* Dropped translate_fn mechanism and coded functions to handle
save and restore of edge_trigger and priority
* Number of APnR register saved/restored based on number of
priority bits supported]
Reviewed-by: Peter Maydell <address@hidden>
Commit: d3a3e529626fbee5cf0fb33414a85c9493adc280
https://github.com/qemu/qemu/commit/d3a3e529626fbee5cf0fb33414a85c9493adc280
Author: Vijaya Kumar K <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/intc/arm_gicv3_common.c
M hw/intc/arm_gicv3_cpuif.c
M hw/intc/gicv3_internal.h
M target/arm/cpu.h
Log Message:
-----------
target-arm: Add GICv3CPUState in CPUARMState struct
Add gicv3state void pointer to CPUARMState struct
to store GICv3CPUState.
In case of usecase like CPU reset, we need to reset
GICv3CPUState of the CPU. In such scenario, this pointer
becomes handy.
Signed-off-by: Vijaya Kumar K <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Eric Auger <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 07a5628cb89f13b98fe526117fd07e5e273b5a52
https://github.com/qemu/qemu/commit/07a5628cb89f13b98fe526117fd07e5e273b5a52
Author: Vijaya Kumar K <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/intc/arm_gicv3_kvm.c
Log Message:
-----------
hw/intc/arm_gicv3_kvm: Reset GICv3 cpu interface registers
Reset CPU interface registers of GICv3 when CPU is reset.
For this, ARMCPRegInfo struct is registered with one ICC
register whose resetfn is called when cpu is reset.
All the ICC registers are reset under one single register
reset function instead of calling resetfn for each ICC
register.
Signed-off-by: Vijaya Kumar K <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Reviewed-by: Eric Auger <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: 91c968ac72f59345a2ebc3abd483c26200afdf3a
https://github.com/qemu/qemu/commit/91c968ac72f59345a2ebc3abd483c26200afdf3a
Author: Peter Maydell <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/core/qdev.c
Log Message:
-----------
qdev: Have qdev_set_parent_bus() handle devices already on a bus
Instead of qdev_set_parent_bus() silently doing the wrong
thing if it's handed a device that's already on a bus,
have it remove the device from the old bus and add it to
the new one. This is useful for the raspi2 sdcard.
Signed-off-by: Peter Maydell <address@hidden>
Reviewed-by: Igor Mammedov <address@hidden>
Message-id: address@hidden
Commit: 97fb87cc5db87d449f16336226f71232a2054ff4
https://github.com/qemu/qemu/commit/97fb87cc5db87d449f16336226f71232a2054ff4
Author: Clement Deschamps <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/sd/core.c
M include/hw/sd/sd.h
Log Message:
-----------
hw/sd: add card-reparenting function
Provide a new function sdbus_reparent_card() in sd core for reparenting
a card from a SDBus to another one.
This function is required by the raspi platform, where the two SD
controllers can be dynamically switched.
Signed-off-by: Clement Deschamps <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
[PMM: added a doc comment to the header file; changed to
use new behaviour of qdev_set_parent_bus()]
Signed-off-by: Peter Maydell <address@hidden>
Commit: d72fc9dcb10273f7cd55b88fa827af0692a2a232
https://github.com/qemu/qemu/commit/d72fc9dcb10273f7cd55b88fa827af0692a2a232
Author: Clement Deschamps <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/gpio/Makefile.objs
A hw/gpio/bcm2835_gpio.c
A include/hw/gpio/bcm2835_gpio.h
Log Message:
-----------
bcm2835_gpio: add bcm2835 gpio controller
This adds the BCM2835 GPIO controller.
It currently implements:
- The 54 GPIOs as outputs (qemu_irq)
- The SD controller selection via alternate function of GPIOs 48-53
Signed-off-by: Clement Deschamps <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 1eeb5c7deacbfb4d4cad17590a16a99f3d85eabb
https://github.com/qemu/qemu/commit/1eeb5c7deacbfb4d4cad17590a16a99f3d85eabb
Author: Clement Deschamps <address@hidden>
Date: 2017-02-28 (Tue, 28 Feb 2017)
Changed paths:
M hw/arm/bcm2835_peripherals.c
M include/hw/arm/bcm2835_peripherals.h
Log Message:
-----------
bcm2835: add sdhost and gpio controllers
This adds the bcm2835_sdhost and bcm2835_gpio to the BCM2835 platform.
For supporting the SD controller selection (alternate function of GPIOs
48-53), the bcm2835_gpio now exposes an sdbus.
It also has a link to both the sdbus of sdhci and sdhost controllers,
and the card is reparented from one bus to another when the alternate
function of GPIOs 48-53 is modified.
Signed-off-by: Clement Deschamps <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: b28f9db1a7ce4d537ce2fae6fbce5e5e37dc265b
https://github.com/qemu/qemu/commit/b28f9db1a7ce4d537ce2fae6fbce5e5e37dc265b
Author: Peter Maydell <address@hidden>
Date: 2017-03-01 (Wed, 01 Mar 2017)
Changed paths:
M default-configs/arm-softmmu.mak
M hw/arm/armv7m.c
M hw/arm/bcm2835_peripherals.c
M hw/arm/netduino2.c
M hw/arm/stm32f205_soc.c
M hw/core/qdev.c
M hw/gpio/Makefile.objs
A hw/gpio/bcm2835_gpio.c
M hw/intc/Makefile.objs
M hw/intc/arm_gicv3_common.c
M hw/intc/arm_gicv3_cpuif.c
M hw/intc/arm_gicv3_kvm.c
M hw/intc/armv7m_nvic.c
M hw/intc/gicv3_internal.h
M hw/sd/core.c
M hw/timer/Makefile.objs
A hw/timer/armv7m_systick.c
M hw/timer/trace-events
M include/hw/arm/arm.h
A include/hw/arm/armv7m.h
A include/hw/arm/armv7m_nvic.h
M include/hw/arm/bcm2835_peripherals.h
M include/hw/arm/stm32f205_soc.h
A include/hw/gpio/bcm2835_gpio.h
M include/hw/intc/arm_gicv3_common.h
M include/hw/sd/sd.h
A include/hw/timer/armv7m_systick.h
M include/standard-headers/asm-x86/hyperv.h
M include/standard-headers/linux/input-event-codes.h
M include/standard-headers/linux/pci_regs.h
M include/standard-headers/linux/virtio_ids.h
M linux-headers/asm-arm/kvm.h
A linux-headers/asm-arm/unistd-common.h
A linux-headers/asm-arm/unistd-eabi.h
A linux-headers/asm-arm/unistd-oabi.h
M linux-headers/asm-arm/unistd.h
M linux-headers/asm-arm64/kvm.h
M linux-headers/asm-powerpc/kvm.h
M linux-headers/asm-powerpc/unistd.h
M linux-headers/asm-x86/kvm_para.h
M linux-headers/linux/kvm.h
M linux-headers/linux/kvm_para.h
M linux-headers/linux/userfaultfd.h
M linux-headers/linux/vfio.h
M scripts/update-linux-headers.sh
M target/arm/cpu.h
Log Message:
-----------
Merge remote-tracking branch
'remotes/pmaydell/tags/pull-target-arm-20170228-1' into staging
target-arm queue:
* raspi2: add gpio controller and sdhost controller, with
the wiring so the guest can switch which controller the
SD card is attached to
(this is sufficient to get raspbian kernels to boot)
* GICv3: support state save/restore from KVM
* update Linux headers to 4.11
* refactor and QOMify the ARMv7M container object
# gpg: Signature made Tue 28 Feb 2017 17:11:49 GMT
# gpg: using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <address@hidden>"
# gpg: aka "Peter Maydell <address@hidden>"
# gpg: aka "Peter Maydell <address@hidden>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20170228-1: (21 commits)
bcm2835: add sdhost and gpio controllers
bcm2835_gpio: add bcm2835 gpio controller
hw/sd: add card-reparenting function
qdev: Have qdev_set_parent_bus() handle devices already on a bus
hw/intc/arm_gicv3_kvm: Reset GICv3 cpu interface registers
target-arm: Add GICv3CPUState in CPUARMState struct
hw/intc/arm_gicv3_kvm: Implement get/put functions
hw/intc/arm_gicv3_kvm: Add ICC_SRE_EL1 register to vmstate
update Linux headers to 4.11
update-linux-headers: update for 4.11
stm32f205: Rename 'nvic' local to 'armv7m'
stm32f205: Create armv7m object without using armv7m_init()
armv7m: Split systick out from NVIC
armv7m: Don't put core v7M devices under CONFIG_STELLARIS
armv7m: Make bitband device take the address space to access
armv7m: Make NVIC expose a memory region rather than mapping itself
armv7m: Make ARMv7M object take memory region link
armv7m: Use QOMified armv7m object in armv7m_init()
armv7m: QOMify the armv7m container
armv7m: Move NVICState struct definition into header
...
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/7287e3556fdc...b28f9db1a7ce
| [Prev in Thread] |
Current Thread |
[Next in Thread] |
- [Qemu-commits] [qemu/qemu] 3651c2: armv7m: Abstract out the "load kernel" code,
GitHub <=