[Qemu-commits] [qemu/qemu] 465aec: target/s390x: correctly indicate PER nullification

[GitHub]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 465aec461726d5157d458acee94584f8cdfbe4b7
      
https://github.com/qemu/qemu/commit/465aec461726d5157d458acee94584f8cdfbe4b7
  Author: David Hildenbrand <address@hidden>
  Date:   2017-06-13 (Tue, 13 Jun 2017)

  Changed paths:
    M target/s390x/misc_helper.c

  Log Message:
  -----------
  target/s390x: correctly indicate PER nullification

Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: becf8217deb2afc347d5172d9f30c8a8964b8b27
      
https://github.com/qemu/qemu/commit/becf8217deb2afc347d5172d9f30c8a8964b8b27
  Author: David Hildenbrand <address@hidden>
  Date:   2017-06-13 (Tue, 13 Jun 2017)

  Changed paths:
    M target/s390x/cpu.h
    M target/s390x/helper.c
    M target/s390x/misc_helper.c
    M target/s390x/mmu_helper.c
    M target/s390x/translate.c

  Log Message:
  -----------
  target/s390x: rework PGM interrupt psw.addr handling

We can tell from the program interrupt code, whether a program interrupt
has to forward the address in the PGM new PSW
(suppressing/terminated/completed) to point at the next instruction, or
if it is nullifying and the PSW address does not have to be incremented.

So let's not modify the PSW address outside of the injection path and
handle this internally. We just have to handle instruction length
auto detection if no valid instruction length can be provided.

This should fix various program interrupt injection paths, where the
PSW was not properly forwarded.

Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: 076d4d39b65f50ca1bba3d3c8a8f1cf977c1c3f0
      
https://github.com/qemu/qemu/commit/076d4d39b65f50ca1bba3d3c8a8f1cf977c1c3f0
  Author: David Hildenbrand <address@hidden>
  Date:   2017-06-13 (Tue, 13 Jun 2017)

  Changed paths:
    M target/s390x/cpu.h
    M target/s390x/cpu_models.c
    M target/s390x/insn-data.def
    M target/s390x/misc_helper.c
    M target/s390x/translate.c

  Log Message:
  -----------
  s390x/cpumodel: wire up cpu type + id for TCG

Let's properly expose the CPU type (machine-type number) via "STORE CPU
ID" and "STORE SUBSYSTEM INFORMATION".

As TCG emulates basic mode, the CPU identification number has the format
"Annnnn", whereby A is the CPU address, and n are parts of the CPU serial
number (0 for us for now).

A specification exception will be injected if the address is not aligned
to a double word. Low address protection will not be checked as
we're missing some more general support for that.

Signed-off-by: David Hildenbrand <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>


  Commit: edf8bc98424d62035d5e4c0f39542722d72d7979
      
https://github.com/qemu/qemu/commit/edf8bc98424d62035d5e4c0f39542722d72d7979
  Author: Peter Maydell <address@hidden>
  Date:   2017-06-15 (Thu, 15 Jun 2017)

  Changed paths:
    M target/s390x/cpu.h
    M target/s390x/cpu_models.c
    M target/s390x/helper.c
    M target/s390x/insn-data.def
    M target/s390x/misc_helper.c
    M target/s390x/mmu_helper.c
    M target/s390x/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/rth/tags/pull-s390-20170613' into 
staging

Queued s390 patches

# gpg: Signature made Tue 13 Jun 2017 21:22:41 BST
# gpg:                using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"
# gpg:                 aka "Richard Henderson <address@hidden>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC  16A4 AD12 70CC 4DD0 279B

* remotes/rth/tags/pull-s390-20170613:
  s390x/cpumodel: wire up cpu type + id for TCG
  target/s390x: rework PGM interrupt psw.addr handling
  target/s390x: correctly indicate PER nullification

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/73aa4692ec00...edf8bc98424d