qemu-commits
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-commits] [qemu/qemu] 0c86b2: pseries: fix TCG migration


From: GitHub
Subject: [Qemu-commits] [qemu/qemu] 0c86b2: pseries: fix TCG migration
Date: Mon, 04 Dec 2017 04:41:57 -0800

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 0c86b2df78fecf1d0b5017e1bab6b2607556c5ed
      
https://github.com/qemu/qemu/commit/0c86b2df78fecf1d0b5017e1bab6b2607556c5ed
  Author: Laurent Vivier <address@hidden>
  Date:   2017-11-30 (Thu, 30 Nov 2017)

  Changed paths:
    M hw/ppc/spapr.c

  Log Message:
  -----------
  pseries: fix TCG migration

Migration of pseries is broken with TCG because
QEMU tries to restore KVM MMU state unconditionally.

The result is a SIGSEGV in kvm_vm_ioctl():

  #0  kvm_vm_ioctl (s=0x0, type=-2146390353)
      at qemu/accel/kvm/kvm-all.c:2032
  #1  0x00000001003e3e2c in kvmppc_configure_v3_mmu (cpu=<optimized out>,
      radix=<optimized out>, gtse=<optimized out>, proc_tbl=<optimized out>)
      at qemu/target/ppc/kvm.c:396
  #2  0x00000001002f8b88 in spapr_post_load (opaque=0x1019103c0,
      version_id=<optimized out>) at qemu/hw/ppc/spapr.c:1578
  #3  0x000000010059e4cc in vmstate_load_state (f=0x106230000,
      vmsd=0x1009479e0 <vmstate_spapr>, opaque=0x1019103c0,
      version_id=<optimized out>) at qemu/migration/vmstate.c:165
  #4  0x00000001005987e0 in vmstate_load (f=<optimized out>, se=<optimized out>)
      at qemu/migration/savevm.c:748

This patch fixes the problem by not calling the KVM function with the
TCG mode.

Fixes: d39c90f5f3 ("spapr: Fix migration of Radix guests")
Signed-off-by: Laurent Vivier <address@hidden>
Reviewed-by: Suraj Jitindar Singh <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: be1b21e885743c08c921846c7201ff59fe82b8b0
      
https://github.com/qemu/qemu/commit/be1b21e885743c08c921846c7201ff59fe82b8b0
  Author: Kurban Mallachiev <address@hidden>
  Date:   2017-11-30 (Thu, 30 Nov 2017)

  Changed paths:
    M target/ppc/machine.c

  Log Message:
  -----------
  target-ppc: Don't invalidate non-supported msr bits

The msr invalidation code (commits 993eb and 2360b) inverts all
bits except MSR_TGPR and MSR_HVB. On non PowerPC 601 processors
this leads to incorrect change of excp_prefix in hreg_store_msr()
function. The problem is that new msr value get multiplied by msr_mask
and inverted msr does not, thus values of MSR_EP bit in new msr value
and inverted msr are distinct, so that excp_prefix changes but should
not.

Signed-off-by: Kurban Mallachiev <address@hidden>
Signed-off-by: David Gibson <address@hidden>


  Commit: 768a20f3a491ed4afce73ebb65347d55251c0ebd
      
https://github.com/qemu/qemu/commit/768a20f3a491ed4afce73ebb65347d55251c0ebd
  Author: David Gibson <address@hidden>
  Date:   2017-12-04 (Mon, 04 Dec 2017)

  Changed paths:
    M hw/ppc/spapr.c

  Log Message:
  -----------
  spapr: Include "pre-plugged" DIMMS in ram size calculation at reset

At guest reset time, we allocate a hash page table (HPT) for the guest
based on the guest's RAM size.  If dynamic HPT resizing is not available we
use the maximum RAM size, if it is we use the current RAM size.

But the "current RAM size" calculation is incorrect - we just use the
"base" ram_size from the machine structure.  This doesn't include any
pluggable DIMMs that are already plugged at reset time.

This means that if you try to start a 'pseries' machine with a DIMM
specified on the command line that's much larger than the "base" RAM size,
then the guest will get a woefully inadequate HPT.  This can lead to a
guest freeze during boot as it runs out of HPT space during initial MMU
setup.

Signed-off-by: David Gibson <address@hidden>
Reviewed-by: Greg Kurz <address@hidden>
Tested-by: Greg Kurz <address@hidden>


  Commit: 495566ec38817e6625294e6909cffb4de040c8e7
      
https://github.com/qemu/qemu/commit/495566ec38817e6625294e6909cffb4de040c8e7
  Author: Peter Maydell <address@hidden>
  Date:   2017-12-04 (Mon, 04 Dec 2017)

  Changed paths:
    M hw/ppc/spapr.c
    M target/ppc/machine.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.11-20171204' 
into staging

ppc patch queue 2017-12-04

We are, alas, not yet to the bottom of ppc bugs.  This pull request
fixes several more.  I believe they're important enough to include in
2.11. despite the late date.

# gpg: Signature made Mon 04 Dec 2017 03:40:56 GMT
# gpg:                using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <address@hidden>"
# gpg:                 aka "David Gibson (Red Hat) <address@hidden>"
# gpg:                 aka "David Gibson (ozlabs.org) <address@hidden>"
# gpg:                 aka "David Gibson (kernel.org) <address@hidden>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.11-20171204:
  spapr: Include "pre-plugged" DIMMS in ram size calculation at reset
  target-ppc: Don't invalidate non-supported msr bits
  pseries: fix TCG migration

Signed-off-by: Peter Maydell <address@hidden>


Compare: https://github.com/qemu/qemu/compare/c11d61271b9e...495566ec3881

reply via email to

[Prev in Thread] Current Thread [Next in Thread]