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[Qemu-commits] [qemu/qemu] 7170ac: tcg/arm: Fix double-word comparisons
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[Qemu-commits] [qemu/qemu] 7170ac: tcg/arm: Fix double-word comparisons |
Date: |
Tue, 16 Jan 2018 10:57:59 -0800 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 7170ac33135e6ecf89752d3949bcecf9b9766d1c
https://github.com/qemu/qemu/commit/7170ac33135e6ecf89752d3949bcecf9b9766d1c
Author: Richard Henderson <address@hidden>
Date: 2018-01-16 (Tue, 16 Jan 2018)
Changed paths:
M tcg/arm/tcg-target.inc.c
Log Message:
-----------
tcg/arm: Fix double-word comparisons
The code sequence we were generating was only good for unsigned
comparisons. For signed comparisions, use the sequence from gcc.
Fixes booting of ppc64 firmware, with a patch changing the code
sequence for ppc comparisons.
Tested-by: Michael Roth <address@hidden>
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Commit: 71f9cee9d0a36dc4c00dfeeeca1301f265268f62
https://github.com/qemu/qemu/commit/71f9cee9d0a36dc4c00dfeeeca1301f265268f62
Author: Richard Henderson <address@hidden>
Date: 2018-01-16 (Tue, 16 Jan 2018)
Changed paths:
M tcg/arm/tcg-target.inc.c
Log Message:
-----------
tcg/arm: Support tlb offsets larger than 64k
AArch64 with SVE has an offset of 80k to the 8th TLB.
Signed-off-by: Richard Henderson <address@hidden>
Commit: 4a64e0fd6876e45b34cd87b700ee30ef5c10c87a
https://github.com/qemu/qemu/commit/4a64e0fd6876e45b34cd87b700ee30ef5c10c87a
Author: Richard Henderson <address@hidden>
Date: 2018-01-16 (Tue, 16 Jan 2018)
Changed paths:
M tcg/ppc/tcg-target.inc.c
Log Message:
-----------
tcg/ppc: Support tlb offsets larger than 64k
AArch64 with SVE has an offset of 80k to the 8th TLB.
Signed-off-by: Richard Henderson <address@hidden>
Commit: 030ffe39dd4128eb90483af82a5b23b23054a466
https://github.com/qemu/qemu/commit/030ffe39dd4128eb90483af82a5b23b23054a466
Author: Richard Henderson <address@hidden>
Date: 2018-01-16 (Tue, 16 Jan 2018)
Changed paths:
M tcg/ppc/tcg-target.inc.c
Log Message:
-----------
tcg/ppc: Allow a 32-bit offset to the constant pool
We recently relaxed the limit of the number of opcodes that can
appear in a TranslationBlock. In certain cases this has resulted
in relocation overflow.
Signed-off-by: Richard Henderson <address@hidden>
Commit: 8e5dc9ba49743b46d955ec7dacb04e42ae7ada7c
https://github.com/qemu/qemu/commit/8e5dc9ba49743b46d955ec7dacb04e42ae7ada7c
Author: Peter Maydell <address@hidden>
Date: 2018-01-16 (Tue, 16 Jan 2018)
Changed paths:
M tcg/arm/tcg-target.inc.c
M tcg/ppc/tcg-target.inc.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20180116' into staging
Queued TCG patches
# gpg: Signature made Tue 16 Jan 2018 16:24:50 GMT
# gpg: using RSA key 0x64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <address@hidden>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-tcg-20180116:
tcg/ppc: Allow a 32-bit offset to the constant pool
tcg/ppc: Support tlb offsets larger than 64k
tcg/arm: Support tlb offsets larger than 64k
tcg/arm: Fix double-word comparisons
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/c1d5b9add7b0...8e5dc9ba4974
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