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[Qemu-commits] [qemu/qemu] 6111a0: hw/arm/bcm283x: Correct the license t
From: |
Peter Maydell |
Subject: |
[Qemu-commits] [qemu/qemu] 6111a0: hw/arm/bcm283x: Correct the license text |
Date: |
Mon, 23 Mar 2020 14:00:12 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 6111a0c0eddf320a0702c3fde17c61bb3dd02963
https://github.com/qemu/qemu/commit/6111a0c0eddf320a0702c3fde17c61bb3dd02963
Author: Philippe Mathieu-Daudé <address@hidden>
Date: 2020-03-23 (Mon, 23 Mar 2020)
Changed paths:
M hw/arm/bcm2835_peripherals.c
M hw/arm/bcm2836.c
M hw/arm/raspi.c
M hw/display/bcm2835_fb.c
M hw/dma/bcm2835_dma.c
M hw/intc/bcm2835_ic.c
M hw/intc/bcm2836_control.c
M hw/misc/bcm2835_mbox.c
M hw/misc/bcm2835_property.c
M include/hw/arm/bcm2835_peripherals.h
M include/hw/arm/bcm2836.h
M include/hw/char/bcm2835_aux.h
M include/hw/display/bcm2835_fb.h
M include/hw/dma/bcm2835_dma.h
M include/hw/intc/bcm2835_ic.h
M include/hw/intc/bcm2836_control.h
M include/hw/misc/bcm2835_mbox.h
M include/hw/misc/bcm2835_mbox_defs.h
M include/hw/misc/bcm2835_property.h
Log Message:
-----------
hw/arm/bcm283x: Correct the license text
The license is the 'GNU General Public License v2.0 or later',
not 'and':
This program is free software; you can redistribute it and/ori
modify it under the terms of the GNU General Public License as
published by the Free Software Foundation; either version 2 of
the License, or (at your option) any later version.
Fix the license comment.
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 4dabf39592e92d692c6f2a1633571114ae25d843
https://github.com/qemu/qemu/commit/4dabf39592e92d692c6f2a1633571114ae25d843
Author: Cédric Le Goater <address@hidden>
Date: 2020-03-23 (Mon, 23 Mar 2020)
Changed paths:
M hw/arm/aspeed_ast2600.c
M hw/ssi/aspeed_smc.c
M hw/ssi/trace-events
Log Message:
-----------
aspeed/smc: Fix DMA support for AST2600
Recent firmwares uses SPI DMA transfers in U-Boot to load the
different images (kernel, initrd, dtb) in the SoC DRAM. The AST2600
FMC model is missing the masks to be applied on the DMA registers
which resulted in incorrect values. Fix that and wire the SPI
controllers which have DMA support on the AST2600.
Fixes: bcaa8ddd081c ("aspeed/smc: Add AST2600 support")
Signed-off-by: Cédric Le Goater <address@hidden>
Reviewed-by: Joel Stanley <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
Commit: ae1111d4def40c6f592c3a307c599272b778eb65
https://github.com/qemu/qemu/commit/ae1111d4def40c6f592c3a307c599272b778eb65
Author: Richard Henderson <address@hidden>
Date: 2020-03-23 (Mon, 23 Mar 2020)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Rearrange disabled check for watchpoints
Coverity rightly notes that ctz32(bas) on 0 will return 32,
which makes the len calculation a BAD_SHIFT.
A value of 0 in DBGWCR<n>_EL1.BAS is reserved. Simply move
the existing check we have for this case.
Reported-by: Coverity (CID 1421964)
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 3944d58db3fc5bf131345a21a44013bc13849a12
https://github.com/qemu/qemu/commit/3944d58db3fc5bf131345a21a44013bc13849a12
Author: Richard Henderson <address@hidden>
Date: 2020-03-23 (Mon, 23 Mar 2020)
Changed paths:
M target/arm/translate-a64.c
Log Message:
-----------
target/arm: Assert immh != 0 in disas_simd_shift_imm
Coverity raised a shed-load of errors cascading from inferring
that clz32(immh) might yield 32, from immh might be 0.
While immh cannot be 0 from encoding, it is not obvious even to
a human how we've checked that: via the filtering provided by
data_proc_simd[].
Reported-by: Coverity (CID 1421923, and more)
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: 550a04893c2bd4442211b353680b9a6408d94dba
https://github.com/qemu/qemu/commit/550a04893c2bd4442211b353680b9a6408d94dba
Author: Richard Henderson <address@hidden>
Date: 2020-03-23 (Mon, 23 Mar 2020)
Changed paths:
M target/arm/translate-a64.c
Log Message:
-----------
target/arm: Move computation of index in handle_simd_dupe
Coverity reports a BAD_SHIFT with ctz32(imm5), with imm5 == 0.
This is an invalid encoding, but we diagnose that just below
by rejecting size > 3. Avoid the warning by sinking the
computation of index below the check.
Reported-by: Coverity (CID 1421965)
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Commit: c532b954d96f96d361ca31308f75f1b95bd4df76
https://github.com/qemu/qemu/commit/c532b954d96f96d361ca31308f75f1b95bd4df76
Author: Peter Maydell <address@hidden>
Date: 2020-03-23 (Mon, 23 Mar 2020)
Changed paths:
M hw/arm/aspeed_ast2600.c
M hw/arm/bcm2835_peripherals.c
M hw/arm/bcm2836.c
M hw/arm/raspi.c
M hw/display/bcm2835_fb.c
M hw/dma/bcm2835_dma.c
M hw/intc/bcm2835_ic.c
M hw/intc/bcm2836_control.c
M hw/misc/bcm2835_mbox.c
M hw/misc/bcm2835_property.c
M hw/ssi/aspeed_smc.c
M hw/ssi/trace-events
M include/hw/arm/bcm2835_peripherals.h
M include/hw/arm/bcm2836.h
M include/hw/char/bcm2835_aux.h
M include/hw/display/bcm2835_fb.h
M include/hw/dma/bcm2835_dma.h
M include/hw/intc/bcm2835_ic.h
M include/hw/intc/bcm2836_control.h
M include/hw/misc/bcm2835_mbox.h
M include/hw/misc/bcm2835_mbox_defs.h
M include/hw/misc/bcm2835_property.h
M target/arm/helper.c
M target/arm/translate-a64.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200323'
into staging
target-arm queue:
* target/arm: avoid undefined behaviour shift in watchpoint code
* target/arm: avoid undefined behaviour shift in handle_simd_dupe()
* target/arm: add assert that immh != 0 in disas_simd_shift_imm()
* aspeed/smc: Fix DMA support for AST2600
* hw/arm/bcm283x: Correct the license text ('and' vs 'or')
# gpg: Signature made Mon 23 Mar 2020 17:38:59 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "address@hidden"
# gpg: Good signature from "Peter Maydell <address@hidden>" [ultimate]
# gpg: aka "Peter Maydell <address@hidden>" [ultimate]
# gpg: aka "Peter Maydell <address@hidden>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20200323:
target/arm: Move computation of index in handle_simd_dupe
target/arm: Assert immh != 0 in disas_simd_shift_imm
target/arm: Rearrange disabled check for watchpoints
aspeed/smc: Fix DMA support for AST2600
hw/arm/bcm283x: Correct the license text
Signed-off-by: Peter Maydell <address@hidden>
Compare: https://github.com/qemu/qemu/compare/787f82407c50...c532b954d96f
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