[Qemu-commits] [qemu/qemu] 59afd4: target/xtensa: work around missing SR definitions

[Peter Maydell]

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: 59afd43daedabe672c289326a5f268f737d35252
      
https://github.com/qemu/qemu/commit/59afd43daedabe672c289326a5f268f737d35252
  Author: Max Filippov <jcmvbkbc@gmail.com>
  Date:   2020-04-30 (Thu, 30 Apr 2020)

  Changed paths:
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: work around missing SR definitions

Xtensa configuration overlays for recent releases may have special
registers for which [rwx]sr opcodes are defined, but they are not listed
as SR in xtensa_sysreg_name and associated functions. As a result
generic translate_[rwx]sr* functions generate access to uninitialized
cpu_SR causing segfault at runtime.
Don't try to access cpu_SR for such registers, ignore writes and return
0 for reads.

Cc: qemu-stable@nongnu.org
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>


  Commit: 2cc2278edf0403720397a33b0747e0aba9e6d420
      
https://github.com/qemu/qemu/commit/2cc2278edf0403720397a33b0747e0aba9e6d420
  Author: Max Filippov <jcmvbkbc@gmail.com>
  Date:   2020-05-17 (Sun, 17 May 2020)

  Changed paths:
    M target/xtensa/cpu.h
    M target/xtensa/overlay_tool.h

  Log Message:
  -----------
  target/xtensa: fetch HW version from configuration overlay

Xtensa architecture has features which behavior depends on hardware
version. Provide hardware version information to translators: add
XtensaConfig::hw_version and use XCHAL_HW_VERSION from configuration
overlay to initialize it.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>


  Commit: 62ed68e33db89584355ca4c63cd5b21dd98df636
      
https://github.com/qemu/qemu/commit/62ed68e33db89584355ca4c63cd5b21dd98df636
  Author: Max Filippov <jcmvbkbc@gmail.com>
  Date:   2020-05-17 (Sun, 17 May 2020)

  Changed paths:
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: fix simcall for newer hardware

After Xtensa release RE.2 simcall opcode has become nop for the
hardware instead of illegal instruction.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>


  Commit: 8a3a81478dcc592518069125a6ad271fe5511b95
      
https://github.com/qemu/qemu/commit/8a3a81478dcc592518069125a6ad271fe5511b95
  Author: Max Filippov <jcmvbkbc@gmail.com>
  Date:   2020-06-22 (Mon, 22 Jun 2020)

  Changed paths:
    M target/xtensa/translate.c

  Log Message:
  -----------
  target/xtensa: drop gen_io_end call

Since commit
ba3e7926691e ("icount: clean up cpu_can_io at the entry to the block")
it has been unnecessary for target code to call gen_io_end() after an IO
instruction in icount mode; it is sufficient to call gen_io_start()
before it and to force the end of the TB.
Remaining call in xtensa target translator is for the opcodes that may
change IRQ state. All of them end current TB, so gen_io_end is not
needed. Drop gen_io_end call from the xtensa target translator.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 5acc270a355120ce967ca1f1eeca0abbdb9303c8
      
https://github.com/qemu/qemu/commit/5acc270a355120ce967ca1f1eeca0abbdb9303c8
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2020-06-25 (Thu, 25 Jun 2020)

  Changed paths:
    M target/xtensa/cpu.h
    M target/xtensa/overlay_tool.h
    M target/xtensa/translate.c

  Log Message:
  -----------
  Merge remote-tracking branch 'remotes/xtensa/tags/20200625-xtensa' into 
staging

target/xtensa fixes for 5.1:

- fix access to special registers missing in the core configuration;
- fix simcall opcode behavior for new hardware;
- drop gen_io_end call from xtensa translator.

# gpg: Signature made Thu 25 Jun 2020 09:08:58 BST
# gpg:                using RSA key 2B67854B98E5327DCDEB17D851F9CC91F83FA044
# gpg:                issuer "jcmvbkbc@gmail.com"
# gpg: Good signature from "Max Filippov <filippov@cadence.com>" [unknown]
# gpg:                 aka "Max Filippov <max.filippov@cogentembedded.com>" 
[full]
# gpg:                 aka "Max Filippov <jcmvbkbc@gmail.com>" [full]
# Primary key fingerprint: 2B67 854B 98E5 327D CDEB  17D8 51F9 CC91 F83F A044

* remotes/xtensa/tags/20200625-xtensa:
  target/xtensa: drop gen_io_end call
  target/xtensa: fix simcall for newer hardware
  target/xtensa: fetch HW version from configuration overlay
  target/xtensa: work around missing SR definitions

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/63d211993b73...5acc270a3551