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[Qemu-commits] [qemu/qemu] cdc05f: tests/tcg: Add microblaze to arches f
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From: |
Peter Maydell |
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Subject: |
[Qemu-commits] [qemu/qemu] cdc05f: tests/tcg: Add microblaze to arches filter |
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Date: |
Wed, 02 Sep 2020 07:30:31 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: cdc05fb4c3b47c5f2d1abd71dbec034436012056
https://github.com/qemu/qemu/commit/cdc05fb4c3b47c5f2d1abd71dbec034436012056
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M tests/tcg/configure.sh
Log Message:
-----------
tests/tcg: Add microblaze to arches filter
Not attempting to use a single cross-compiler for both
big-endian and little-endian at this time.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 4c71dc37fb56bd41893c74cb5d164a2a009e8a1f
https://github.com/qemu/qemu/commit/4c71dc37fb56bd41893c74cb5d164a2a009e8a1f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M tests/tcg/multiarch/float_convs.c
M tests/tcg/multiarch/float_madds.c
Log Message:
-----------
tests/tcg: Do not require FE_TOWARDZERO
This is optional in ISO C, and not all cpus provide it.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 853c93ed0d7d462224a6d74c474cf89981a2561b
https://github.com/qemu/qemu/commit/853c93ed0d7d462224a6d74c474cf89981a2561b
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M tests/tcg/multiarch/float_helpers.h
Log Message:
-----------
tests/tcg: Do not require FE_* exception bits
Define anything that is missing as 0, so that flags & FE_FOO
is false for any missing FOO.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 8a42ddf013738a15c9cb739b9dfc07500cb27a21
https://github.com/qemu/qemu/commit/8a42ddf013738a15c9cb739b9dfc07500cb27a21
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/gdbstub.c
Log Message:
-----------
target/microblaze: Tidy gdbstub
Use an enumeration for the gdb register mapping. Use one
switch statement for the entire dispatch. Drop sreg_map
and simply enumerate those cases explicitly. Force r0 to
have value 0 and ignore writes.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 76e8187d0078e6b926a9a648fb755df4dd266e05
https://github.com/qemu/qemu/commit/76e8187d0078e6b926a9a648fb755df4dd266e05
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M linux-user/microblaze/cpu_loop.c
M linux-user/microblaze/signal.c
M target/microblaze/cpu.c
M target/microblaze/cpu.h
M target/microblaze/gdbstub.c
M target/microblaze/helper.c
M target/microblaze/mmu.c
M target/microblaze/op_helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Split out PC from env->sregs
Begin eliminating the sregs array in favor of individual members.
Does not correct the width of pc, yet.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2e5282caa8eb6b5bab6c62cba902be1996dcb713
https://github.com/qemu/qemu/commit/2e5282caa8eb6b5bab6c62cba902be1996dcb713
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.c
M target/microblaze/cpu.h
M target/microblaze/gdbstub.c
M target/microblaze/helper.c
M target/microblaze/op_helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Split out MSR from env->sregs
Continue eliminating the sregs array in favor of individual members.
Does not correct the width of MSR, yet.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: b2e80a3c191e90dee7ad05df303c237d9819bee4
https://github.com/qemu/qemu/commit/b2e80a3c191e90dee7ad05df303c237d9819bee4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
M target/microblaze/gdbstub.c
M target/microblaze/helper.c
M target/microblaze/op_helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Split out EAR from env->sregs
Continue eliminating the sregs array in favor of individual members.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 78e9caf2f9410c8b90bb6d5a6449c750056c3f8a
https://github.com/qemu/qemu/commit/78e9caf2f9410c8b90bb6d5a6449c750056c3f8a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M linux-user/microblaze/cpu_loop.c
M target/microblaze/cpu.h
M target/microblaze/gdbstub.c
M target/microblaze/helper.c
M target/microblaze/op_helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Split out ESR from env->sregs
Continue eliminating the sregs array in favor of individual members.
Does not correct the width of ESR, yet.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5a8e01366c5dfe93f608e7d37f385962495d5161
https://github.com/qemu/qemu/commit/5a8e01366c5dfe93f608e7d37f385962495d5161
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M linux-user/microblaze/cpu_loop.c
M target/microblaze/cpu.h
M target/microblaze/gdbstub.c
M target/microblaze/op_helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Split out FSR from env->sregs
Continue eliminating the sregs array in favor of individual members.
Does not correct the width of FSR, yet.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 6fbf78f24a43c57925dc4e789dc236cdec443987
https://github.com/qemu/qemu/commit/6fbf78f24a43c57925dc4e789dc236cdec443987
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
M target/microblaze/gdbstub.c
M target/microblaze/helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Split out BTR from env->sregs
Continue eliminating the sregs array in favor of individual members.
Does not correct the width of BTR, yet.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: af20a93acb5e9da63976e113656d09e4bcbdddac
https://github.com/qemu/qemu/commit/af20a93acb5e9da63976e113656d09e4bcbdddac
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M linux-user/elfload.c
M target/microblaze/cpu.h
M target/microblaze/gdbstub.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Split out EDR from env->sregs
Finish eliminating the sregs array in favor of individual members.
Does not correct the width of EDR, yet.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: aa28e6d4c70d16415ad110a173c8af618fbceb96
https://github.com/qemu/qemu/commit/aa28e6d4c70d16415ad110a173c8af618fbceb96
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Split the cpu_SR array
Similar to splitting the sregs array, this will allow further
fixes and cleanups.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 0f96e96bd5144b1a834fed2b53a17fcf46637dcb
https://github.com/qemu/qemu/commit/0f96e96bd5144b1a834fed2b53a17fcf46637dcb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
M target/microblaze/helper.c
M target/microblaze/mmu.c
M target/microblaze/op_helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Fix width of PC and BTARGET
The program counter is only 32-bits wide. Do not use a 64-bit
type to represent it. Since they are so closely related, fix
btarget at the same time.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3e0e16ae1e0048a21a91674061ec9c43c5d7a76c
https://github.com/qemu/qemu/commit/3e0e16ae1e0048a21a91674061ec9c43c5d7a76c
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
M target/microblaze/helper.c
M target/microblaze/op_helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Fix width of MSR
The machine status register is only 32-bits wide.
Do not use a 64-bit type to represent it.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 6efd55995a224787baa712500b82ef21a148d38e
https://github.com/qemu/qemu/commit/6efd55995a224787baa712500b82ef21a148d38e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M linux-user/microblaze/cpu_loop.c
M target/microblaze/cpu.h
M target/microblaze/helper.c
M target/microblaze/op_helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Fix width of ESR
The exception status register is only 32-bits wide.
Do not use a 64-bit type to represent it.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 86017ccfbd2b39371bd47dd7d2bed69ee184c3e5
https://github.com/qemu/qemu/commit/86017ccfbd2b39371bd47dd7d2bed69ee184c3e5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Fix width of FSR
The exception status register is only 32-bits wide. Do not use a
64-bit type to represent it. Since cpu_fsr is only used during
MSR and MTR instructions, we can just as easily use an explicit
load and store, so eliminate the variable.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ccf628b7939c542cf9e46e9aaa2b0acf0888ec52
https://github.com/qemu/qemu/commit/ccf628b7939c542cf9e46e9aaa2b0acf0888ec52
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Fix width of BTR
The branch target register is only 32-bits wide. Do not use a
64-bit type to represent it. Since cpu_btr is only used during
MSR and MTR instructions, we can just as easily use an explicit
load and store, so eliminate the variable.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 39db007eda4310f305fdbc712d59d99284bf11d4
https://github.com/qemu/qemu/commit/39db007eda4310f305fdbc712d59d99284bf11d4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Fix width of EDR
The exception data register is only 32-bits wide. Do not use a
64-bit type to represent it. Since cpu_edr is only used during
MSR and MTR instructions, we can just as easily use an explicit
load and store, so eliminate the variable.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: dbdb77c4df97205f9fbe1ec10ad35c1cb9729c12
https://github.com/qemu/qemu/commit/dbdb77c4df97205f9fbe1ec10ad35c1cb9729c12
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Remove cpu_ear
Since cpu_ear is only used during MSR and MTR instructions,
we can just as easily use an explicit load and store, so
eliminate the variable.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 41ba37c4778e9364348e4ffe448650ae5e4b3563
https://github.com/qemu/qemu/commit/41ba37c4778e9364348e4ffe448650ae5e4b3563
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Tidy raising of exceptions
Split out gen_raise_exception which does no cpu state sync.
Rename t_gen_raise_exception to gen_raise_exception_sync to
emphasize that it does a sync. Create gen_raise_hw_excp to
simplify code raising EXCP_HW_EXCP.
Since there is now only one use of cpu_esr, perform a store
instead and remove the TCG variable.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 41060b74bf4597b8260205bf1b6ed43c3b1696d7
https://github.com/qemu/qemu/commit/41060b74bf4597b8260205bf1b6ed43c3b1696d7
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/helper.h
Log Message:
-----------
target/microblaze: Mark raise_exception as noreturn
This will allow tcg to remove any dead code that might
follow an exception.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: eb2022b7d0dcf5be089f9519ac096ebe60b46797
https://github.com/qemu/qemu/commit/eb2022b7d0dcf5be089f9519ac096ebe60b46797
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
M target/microblaze/helper.h
M target/microblaze/op_helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Remove helper_debug and env->debug
This is not used, and seems redundant with -d cpu.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 9b1585589dd4f9a1357f49d233039db6c4788bf3
https://github.com/qemu/qemu/commit/9b1585589dd4f9a1357f49d233039db6c4788bf3
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Rename env_* tcg variables to cpu_*
This is cpu_imm, cpu_btaken, cpu_iflags, cpu_res_addr and cpu_res_val.
It is standard for these file-scope globals to begin with cpu_*.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 480d29a8fa842ca94297600397041f0efb0c7bd0
https://github.com/qemu/qemu/commit/480d29a8fa842ca94297600397041f0efb0c7bd0
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Tidy mb_tcg_init
All of the tcg globals can be recorded in the same table.
Drop the "r" prefix from "rpc" and "rmsr". Obviates the
need for regnames[], which was incorrectly not const.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1074c0fb9153f631ce93f7e7d74b935fdcb0d82a
https://github.com/qemu/qemu/commit/1074c0fb9153f631ce93f7e7d74b935fdcb0d82a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M linux-user/elfload.c
M target/microblaze/cpu.c
M target/microblaze/cpu.h
M target/microblaze/gdbstub.c
M target/microblaze/helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Split out MSR[C] to its own variable
Having the MSR[C] bit separate will improve arithmetic that operates
on the carry bit. Having mb_cpu_read_msr() populate MSR[CC] will
prevent the carry copy not matching the carry bit.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a2b80dbd96569338a4ac3f32aebbbd2d9a7f9718
https://github.com/qemu/qemu/commit/a2b80dbd96569338a4ac3f32aebbbd2d9a7f9718
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Use DISAS_NORETURN
Both exceptions and gen_goto_tb do not return. Use the
official DISAS_NORETURN enumerator for this case.
This eliminates all use of DISAS_TB_JUMP.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 0b46fa08213b5e575b14a6dc883b45af8c37f6f6
https://github.com/qemu/qemu/commit/0b46fa08213b5e575b14a6dc883b45af8c37f6f6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Check singlestep_enabled in gen_goto_tb
Do not use goto_tb if we're single-stepping.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d4705ae084461ed4b507cdac886d2b8ff29452eb
https://github.com/qemu/qemu/commit/d4705ae084461ed4b507cdac886d2b8ff29452eb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert to DisasContextBase
Part one of conversion to the generic translator_loop is to
use the DisasContextBase and the members therein.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 372122e3e7fe1134dbd232aa4f9f56ffef84143a
https://github.com/qemu/qemu/commit/372122e3e7fe1134dbd232aa4f9f56ffef84143a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert to translator_loop
Finish the conversion to the generic translator_loop.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 47393d564a6e59cacd64326a8348f7bd8417173e
https://github.com/qemu/qemu/commit/47393d564a6e59cacd64326a8348f7bd8417173e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Remove SIM_COMPAT
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ba0f357cae2d9f042f04da3b7d0e08fbbb5b0005
https://github.com/qemu/qemu/commit/ba0f357cae2d9f042f04da3b7d0e08fbbb5b0005
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Remove DISAS_GNU
This is never used.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e3f8d192e089b6985b761d63ee2438aadb377a18
https://github.com/qemu/qemu/commit/e3f8d192e089b6985b761d63ee2438aadb377a18
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/helper.c
M target/microblaze/op_helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Remove empty D macros
This is never used in op_helper.c and translate.c. There are
two trivial uses in helper.c which can be improved by always
logging MMU_EXCP to CPU_LOG_INT.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 11105d67497c94475a9c89df5850fb7a2d52323e
https://github.com/qemu/qemu/commit/11105d67497c94475a9c89df5850fb7a2d52323e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Remove LOG_DIS
Also remove the related defines, DISAS_MB and DEBUG_DISAS.
Rely on print_insn_microblaze.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d7ecb757d1991ff0a58dcecf6c8990dbc19636bd
https://github.com/qemu/qemu/commit/d7ecb757d1991ff0a58dcecf6c8990dbc19636bd
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Ensure imm constant is always available
Include the env->imm value in the TB values when IMM_FLAG is set.
This means that we can always reconstruct the complete 32-bit imm.
Discard env_imm when its contents can no longer be accessed.
Fix user-mode checks for BRK/BRKI, which depend on IMM.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 44d1432ba25742624bdb9841b634d45b6711dcf8
https://github.com/qemu/qemu/commit/44d1432ba25742624bdb9841b634d45b6711dcf8
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
A target/microblaze/insns.decode
M target/microblaze/meson.build
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Add decodetree infrastructure
The new interface is a stub that recognizes no instructions.
It falls back to the old decoder for all instructions.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 20800179655d9262716ff20895c3c9d81ecb2d17
https://github.com/qemu/qemu/commit/20800179655d9262716ff20895c3c9d81ecb2d17
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_add to decodetree
Adds infrastrucure for translation of instructions, which could
not be added before their first use. Cache a temporary which
represents r0 as the immediate 0 value, or a sink.
Move the special case of opcode_0_illegal from old_decode()
into decodetree as well, lest this get interpreted as add.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: a2b0b90e7960c6dcf52be237149c1b9ff289d9a5
https://github.com/qemu/qemu/commit/a2b0b90e7960c6dcf52be237149c1b9ff289d9a5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/helper.h
M target/microblaze/insns.decode
M target/microblaze/op_helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_sub to decodetree
Use tcg_gen_add2_i32 for computing carry.
This removes the last use of helper_carry, so remove that.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 58b48b637db61e28a5e6c1ec9fce42b9f79c7b36
https://github.com/qemu/qemu/commit/58b48b637db61e28a5e6c1ec9fce42b9f79c7b36
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/helper.h
M target/microblaze/op_helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Implement cmp and cmpu inline
These are simple enough operations; we do not need to
call an out-of-line helper.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 607f576762948d1b0d47d74a42e3269beb4adf23
https://github.com/qemu/qemu/commit/607f576762948d1b0d47d74a42e3269beb4adf23
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_pattern to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: cb0a0a4c8686792068860f339eddd695e1a485a1
https://github.com/qemu/qemu/commit/cb0a0a4c8686792068860f339eddd695e1a485a1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_and, dec_or, dec_xor to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 97955ceb422421f48cbbab44cbe9a0998adde2cb
https://github.com/qemu/qemu/commit/97955ceb422421f48cbbab44cbe9a0998adde2cb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_mul to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: b1354342c1c7a01ef251160725db50ee8c40511a
https://github.com/qemu/qemu/commit/b1354342c1c7a01ef251160725db50ee8c40511a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_div to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e98651d9ca475259a6721f6f1cff5da1ad4f0cc1
https://github.com/qemu/qemu/commit/e98651d9ca475259a6721f6f1cff5da1ad4f0cc1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/helper.h
M target/microblaze/op_helper.c
Log Message:
-----------
target/microblaze: Unwind properly when raising divide-by-zero
Restore the correct pc when raising divide-by-zero. Also, the
MSR[DZO] bit is sticky -- it is not cleared with a successful divide.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 39cf386458b4920ea14011af4cb5bb21c5e611fa
https://github.com/qemu/qemu/commit/39cf386458b4920ea14011af4cb5bb21c5e611fa
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_bit to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 081d8e02c352861af5deb20786160fa6860e5f8e
https://github.com/qemu/qemu/commit/081d8e02c352861af5deb20786160fa6860e5f8e
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_barrel to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e64b2e5cfe1a6a158f134e5bfa6c246d23ad1d9d
https://github.com/qemu/qemu/commit/e64b2e5cfe1a6a158f134e5bfa6c246d23ad1d9d
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_imm to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d5aead3df4369f56bf79bcd97a06cd63e4acfee6
https://github.com/qemu/qemu/commit/d5aead3df4369f56bf79bcd97a06cd63e4acfee6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_fpu to decodetree
The current dec_check_fpuv2 test, raising an FPU exception for
an unimplemented instruction, appears to be contradictory to
the manual. Drop that and merely check use_fpu == 2.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7bca6ddf901bba39f890fc80d22c26ed2606f4d5
https://github.com/qemu/qemu/commit/7bca6ddf901bba39f890fc80d22c26ed2606f4d5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/op_helper.c
Log Message:
-----------
target/microblaze: Fix cpu unwind for fpu exceptions
Restore the correct PC when an exception must be raised.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3986c650a25e645a2b39795e5004d7e0e1c7b8b1
https://github.com/qemu/qemu/commit/3986c650a25e645a2b39795e5004d7e0e1c7b8b1
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/helper.h
Log Message:
-----------
target/microblaze: Mark fpu helpers TCG_CALL_NO_WG
Now that FSR is no longer a tcg global temp, we can say that
the fpu helpers do not write to tcg temps. All temps are
read implicitly by the fpu exception path.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2c32179f39278ebc975c3d08710bb22672911889
https://github.com/qemu/qemu/commit/2c32179f39278ebc975c3d08710bb22672911889
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Replace MSR_EE_FLAG with MSR_EE
There's no reason to define MSR_EE_FLAG; we can just use the
original MSR_EE define. Document the other flags copied into
tb_flags with iflag to reserve those bits.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 287b1defeb44398d02669d97ebdc347d650f274d
https://github.com/qemu/qemu/commit/287b1defeb44398d02669d97ebdc347d650f274d
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Cache mem_index in DisasContext
Ideally, nothing outside the top-level of translation even
has access to env. Cache the value in init_disas_context.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3f203194550108a72e8ee55d1b8bcb2333222b71
https://github.com/qemu/qemu/commit/3f203194550108a72e8ee55d1b8bcb2333222b71
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/helper.h
M target/microblaze/op_helper.c
Log Message:
-----------
target/microblaze: Fix cpu unwind for stackprot
Restore the correct PC when an exception must be raised.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: d8e59c4a6f888a8711af293d9ce2bb9609973748
https://github.com/qemu/qemu/commit/d8e59c4a6f888a8711af293d9ce2bb9609973748
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_load and dec_store to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 31f163d3da06f4f5e3cf1342b8970cf85e5a3b37
https://github.com/qemu/qemu/commit/31f163d3da06f4f5e3cf1342b8970cf85e5a3b37
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
Log Message:
-----------
target/microblaze: Assert no overlap in flags making up tb_flags
Create MSR_TB_MASK. Use it in cpu_get_tb_cpu_state, and check
that IFLAGS_TB_MASK does not overlap.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7b34f45f9fe0c9fed16cfef74d0b39f890b87d4f
https://github.com/qemu/qemu/commit/7b34f45f9fe0c9fed16cfef74d0b39f890b87d4f
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
M target/microblaze/helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Move bimm to BIMM_FLAG
It makes sense to keep BIMM with D_FLAG, as they can be written
back to iflags at the same time. BIMM_FLAG does not need to be
added to IFLAGS_TB_MASK because it does not affect the next TB,
only the exception path out of the current TB. Renumber IMM_FLAG,
as the value 4 holds no particular significance; pack these two
flags at the bottom of the bitfield.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 5318223d271865229c85e2cd2d32684b005c1d01
https://github.com/qemu/qemu/commit/5318223d271865229c85e2cd2d32684b005c1d01
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/op_helper.c
Log Message:
-----------
target/microblaze: Fix no-op mb_cpu_transaction_failed
Do not call cpu_restore_state when no exception will be
delivered. This can lead to inconsistent cpu state.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reported-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 683a247ed7a4993464e995106c20acbe237bdbfc
https://github.com/qemu/qemu/commit/683a247ed7a4993464e995106c20acbe237bdbfc
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Store "current" iflags in insn_start
This data is available during exception unwinding, thus
we can restore it from there directly, rather than saving
it during the TB. Thus we may remove the t_sync_flags()
calls in the load/store operations.
Note that these calls were missing from the other places
where runtime exceptions may be raised, such as idiv and
the floating point operations.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 2271a6ac0a075d859b71551626e3cae9817ba7da
https://github.com/qemu/qemu/commit/2271a6ac0a075d859b71551626e3cae9817ba7da
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M include/tcg/tcg.h
Log Message:
-----------
tcg: Add tcg_get_insn_start_param
MicroBlaze will shortly need to update a parameter in place.
Add an interface to read to match that for write.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ab0c8d0f5b3377eba2c14116e199573583ea0089
https://github.com/qemu/qemu/commit/ab0c8d0f5b3377eba2c14116e199573583ea0089
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.c
M target/microblaze/cpu.h
M target/microblaze/helper.c
M target/microblaze/helper.h
M target/microblaze/op_helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Use cc->do_unaligned_access
This fixes the problem in which unaligned stores succeeded,
but then we raised the exception after modifying memory.
Store the ESS for the unaligned data access in the iflags
for the insn, so that it can be found during unwind.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 6f9642d7d799c4774e9e04f95679d370d52633c6
https://github.com/qemu/qemu/commit/6f9642d7d799c4774e9e04f95679d370d52633c6
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Replace clear_imm with tb_flags_to_set
This more general update variable will be able to handle
delay slots as well.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 1e521ce3b095ca9e324912cbd05391f00d37560a
https://github.com/qemu/qemu/commit/1e521ce3b095ca9e324912cbd05391f00d37560a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Replace delayed_branch with tb_flags_to_set
The multi-stage counter can be replaced by clearing D_FLAG,
the or'ing in tb_flags_to_set. The jump then happens when
D_FLAG is finally cleared.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 0c3da918de2ef8b1758d5e11b1c18c4f734c4401
https://github.com/qemu/qemu/commit/0c3da918de2ef8b1758d5e11b1c18c4f734c4401
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Tidy mb_cpu_dump_state
Using lookup_symbol is quite slow; remove that. Decode the
various bits of iflags; only show imm, btaken, btarget when
they are relevant to iflags. Improve formatting.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: f523531471c9342020cda0ef5a2eccb7d77e7e34
https://github.com/qemu/qemu/commit/f523531471c9342020cda0ef5a2eccb7d77e7e34
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M linux-user/microblaze/cpu_loop.c
M target/microblaze/cpu.h
M target/microblaze/helper.c
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert brk and brki to decodetree
Split these out of the normal branch instructions, as they require
special handling. Perform the entire operation inline, instead of
raising EXCP_BREAK to do the work in mb_cpu_do_interrupt.
This fixes a bug in that brki rd, imm, for imm != 0x18 is not
supposed to set MSR_BIP. This fixes a bug in that imm == 0 is
the reset vector and 0x18 is the debug vector, and neither should
raise a tcg exception in system mode.
Introduce EXCP_SYSCALL for microblaze-linux-user.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: ee8c7f9f9ab0c06b26e22d869cc12893e0c73bce
https://github.com/qemu/qemu/commit/ee8c7f9f9ab0c06b26e22d869cc12893e0c73bce
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert mbar to decodetree
Split this out of the normal branch instructions,
as it requires special handling.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: b9c58aabe62381fe736b6b4f9132986b90aa11cb
https://github.com/qemu/qemu/commit/b9c58aabe62381fe736b6b4f9132986b90aa11cb
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu.h
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Reorganize branching
Remove the btaken variable, and simplify things by always computing
the full branch destination into btarget. This avoids all need for
sync_jmpstate().
Retain the direct branch behaviour by remembering the jump destination
in jmp_dest, discarding btarget. In the normal case, where the branch
delay slot cannot trap (e.g. arithmetic), tcg will remove the computation
into btarget, leaving us with just the tcg direct branching at the end.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 16bbbbc91ad0c2c8cfdc0e17a0cb7f60b690b534
https://github.com/qemu/qemu/commit/16bbbbc91ad0c2c8cfdc0e17a0cb7f60b690b534
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_br to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: fd77911304ec3b6881e7e714d5b643693b0ff1ab
https://github.com/qemu/qemu/commit/fd77911304ec3b6881e7e714d5b643693b0ff1ab
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_bcc to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e6cb03548850f14d3236003ae8fd33ab8b95f4ca
https://github.com/qemu/qemu/commit/e6cb03548850f14d3236003ae8fd33ab8b95f4ca
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_rts to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 3fb394fd41420372233e9a49f0e287b3be227e49
https://github.com/qemu/qemu/commit/3fb394fd41420372233e9a49f0e287b3be227e49
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Tidy do_rti, do_rtb, do_rte
Since cpu_msr is no longer a 64-bit quantity, we can simplify
the arithmetic in these functions.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 536e340f464d7c2ef55cca47c7535d9409bf03c7
https://github.com/qemu/qemu/commit/536e340f464d7c2ef55cca47c7535d9409bf03c7
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert msrclr, msrset to decodetree
Split this out of dec_msr.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 9df297a2d84a0c452567ae6c2be2b5c42b8a0931
https://github.com/qemu/qemu/commit/9df297a2d84a0c452567ae6c2be2b5c42b8a0931
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_msr to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 52065d8f4689e88ac2e4b9f49b64399a3e80f40a
https://github.com/qemu/qemu/commit/52065d8f4689e88ac2e4b9f49b64399a3e80f40a
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/insns.decode
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Convert dec_stream to decodetree
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 921afa9daeb90f7d40e0abdec9e13d43c48268dc
https://github.com/qemu/qemu/commit/921afa9daeb90f7d40e0abdec9e13d43c48268dc
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
R target/microblaze/microblaze-decode.h
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Remove last of old decoder
All instructions have been convered. Issue sigill if decodetree
does not match. Remove argument decode from DisasContext.
Remove microblaze-decode.h.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e47c22319921e3eeca08d9fe54de940902942576
https://github.com/qemu/qemu/commit/e47c22319921e3eeca08d9fe54de940902942576
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Remove cpu_R[0]
Do not initialize cpu_R[0], as this should be totally unused.
The cpu_for_read and cpu_for_write functions use a local temp.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: e269b4bdf228f57f6671b7692c08f7304179a4c4
https://github.com/qemu/qemu/commit/e269b4bdf228f57f6671b7692c08f7304179a4c4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/helper.h
Log Message:
-----------
target/microblaze: Add flags markup to some helpers
The mmu_read, mmu_write, get, and put helpers do not touch the
general registers, or any of the other variables managed by tcg.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 19f27b6c2493472fe2790cf08d7b0140d57bdad5
https://github.com/qemu/qemu/commit/19f27b6c2493472fe2790cf08d7b0140d57bdad5
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2020-09-01 (Tue, 01 Sep 2020)
Changed paths:
M target/microblaze/cpu-param.h
M target/microblaze/cpu.h
M target/microblaze/helper.c
M target/microblaze/translate.c
Log Message:
-----------
target/microblaze: Reduce linux-user address space to 32-bit
User-space programs cannot use the 64-bit lwea/swea instructions.
We can improve code generation and runtime by restricting the
user-only address space to 32-bit.
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Commit: 7068d5ef399b4682d9ad77164d700fcca3c77485
https://github.com/qemu/qemu/commit/7068d5ef399b4682d9ad77164d700fcca3c77485
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-09-02 (Wed, 02 Sep 2020)
Changed paths:
M include/tcg/tcg.h
M linux-user/elfload.c
M linux-user/microblaze/cpu_loop.c
M linux-user/microblaze/signal.c
M target/microblaze/cpu-param.h
M target/microblaze/cpu.c
M target/microblaze/cpu.h
M target/microblaze/gdbstub.c
M target/microblaze/helper.c
M target/microblaze/helper.h
A target/microblaze/insns.decode
M target/microblaze/meson.build
R target/microblaze/microblaze-decode.h
M target/microblaze/mmu.c
M target/microblaze/op_helper.c
M target/microblaze/translate.c
M tests/tcg/configure.sh
M tests/tcg/multiarch/float_convs.c
M tests/tcg/multiarch/float_helpers.h
M tests/tcg/multiarch/float_madds.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/rth/tags/pull-mb-20200901' into staging
Convert microblaze to generic translator loop
Convert microblaze to decodetree
Fix mb_cpu_transaction_failed
Other misc cleanups
# gpg: Signature made Tue 01 Sep 2020 16:17:19 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-mb-20200901: (76 commits)
target/microblaze: Reduce linux-user address space to 32-bit
target/microblaze: Add flags markup to some helpers
target/microblaze: Remove cpu_R[0]
target/microblaze: Remove last of old decoder
target/microblaze: Convert dec_stream to decodetree
target/microblaze: Convert dec_msr to decodetree
target/microblaze: Convert msrclr, msrset to decodetree
target/microblaze: Tidy do_rti, do_rtb, do_rte
target/microblaze: Convert dec_rts to decodetree
target/microblaze: Convert dec_bcc to decodetree
target/microblaze: Convert dec_br to decodetree
target/microblaze: Reorganize branching
target/microblaze: Convert mbar to decodetree
target/microblaze: Convert brk and brki to decodetree
target/microblaze: Tidy mb_cpu_dump_state
target/microblaze: Replace delayed_branch with tb_flags_to_set
target/microblaze: Replace clear_imm with tb_flags_to_set
target/microblaze: Use cc->do_unaligned_access
tcg: Add tcg_get_insn_start_param
target/microblaze: Store "current" iflags in insn_start
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/887adde81d1f...7068d5ef399b
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Peter Maydell <=