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[Qemu-commits] [qemu/qemu] 5e623f: hw/misc: add an EMC141{3, 4} device m
From: |
Peter Maydell |
Subject: |
[Qemu-commits] [qemu/qemu] 5e623f: hw/misc: add an EMC141{3, 4} device model |
Date: |
Thu, 10 Dec 2020 06:40:27 -0800 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 5e623f2bf1b4a43022c2fd31919c76ddb9556e17
https://github.com/qemu/qemu/commit/5e623f2bf1b4a43022c2fd31919c76ddb9556e17
Author: John Wang <wangzhiqiang.bj@bytedance.com>
Date: 2020-12-10 (Thu, 10 Dec 2020)
Changed paths:
M hw/arm/Kconfig
M hw/misc/Kconfig
A hw/misc/emc141x.c
M hw/misc/meson.build
A include/hw/misc/emc141x_regs.h
A tests/qtest/emc141x-test.c
M tests/qtest/meson.build
Log Message:
-----------
hw/misc: add an EMC141{3,4} device model
Largely inspired by the TMP421 temperature sensor, here is a model for
the EMC1413/EMC1414 temperature sensors.
Specs can be found here :
http://ww1.microchip.com/downloads/en/DeviceDoc/20005274A.pdf
Signed-off-by: John Wang <wangzhiqiang.bj@bytedance.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20201122105134.671-1-wangzhiqiang.bj@bytedance.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 95f068c83da98874f4f9617b96fa007e8e2a7e9f
https://github.com/qemu/qemu/commit/95f068c83da98874f4f9617b96fa007e8e2a7e9f
Author: John Wang <wangzhiqiang.bj@bytedance.com>
Date: 2020-12-10 (Thu, 10 Dec 2020)
Changed paths:
M hw/arm/aspeed.c
Log Message:
-----------
aspeed: Add support for the g220a-bmc board
G220A is a 2 socket x86 motherboard supported by OpenBMC.
Strapping configuration was obtained from hardware.
Signed-off-by: John Wang <wangzhiqiang.bj@bytedance.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20201122105134.671-2-wangzhiqiang.bj@bytedance.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: e01b4d5b6ec9dbdd1ff31002fca0183f4ea2bf79
https://github.com/qemu/qemu/commit/e01b4d5b6ec9dbdd1ff31002fca0183f4ea2bf79
Author: Joel Stanley <joel@jms.id.au>
Date: 2020-12-10 (Thu, 10 Dec 2020)
Changed paths:
M hw/arm/aspeed_ast2600.c
Log Message:
-----------
ast2600: SRAM is 89KB
On the AST2600A1, the SRAM size was increased to 89KB.
Fixes: 7582591ae745 ("aspeed: Support AST2600A1 silicon revision")
Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20201112012113.835858-1-joel@jms.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: af453a5ef58d21fa902aea9b6e4bc2312ac0467f
https://github.com/qemu/qemu/commit/af453a5ef58d21fa902aea9b6e4bc2312ac0467f
Author: Cédric Le Goater <clg@kaod.org>
Date: 2020-12-10 (Thu, 10 Dec 2020)
Changed paths:
M hw/ssi/aspeed_smc.c
Log Message:
-----------
aspeed/smc: Add support for address lane disablement
The controller can be configured to disable or enable address and data
byte lanes when issuing commands. This is useful in read command mode
to send SPI NOR commands that don't have an address space, such as
RDID. It's a good way to have a unified read operation for registers
and flash contents accesses.
A new SPI driver proposed by Aspeed makes use of this feature. Add
support for address lanes to start with. We will do the same for the
data lanes if they are controlled one day.
Cc: Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Message-Id: <20201120161547.740806-2-clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 6f5f6507e49df4820207a94f3aeaaeab08092d32
https://github.com/qemu/qemu/commit/6f5f6507e49df4820207a94f3aeaaeab08092d32
Author: John Wang <wangzhiqiang.bj@bytedance.com>
Date: 2020-12-10 (Thu, 10 Dec 2020)
Changed paths:
M hw/arm/aspeed.c
Log Message:
-----------
aspeed: g220a-bmc: Add an FRU
Add an eeprom device and fill it with fru
information
$ ipmitool fru print 0
Product Manufacturer : Bytedance
Product Name : G220A
Signed-off-by: John Wang <wangzhiqiang.bj@bytedance.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20201210103607.556-1-wangzhiqiang.bj@bytedance.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Commit: 379e9eaed497a2e09b5985e1e15967d7bfea8296
https://github.com/qemu/qemu/commit/379e9eaed497a2e09b5985e1e15967d7bfea8296
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2020-12-10 (Thu, 10 Dec 2020)
Changed paths:
M hw/arm/Kconfig
M hw/arm/aspeed.c
M hw/arm/aspeed_ast2600.c
M hw/misc/Kconfig
A hw/misc/emc141x.c
M hw/misc/meson.build
M hw/ssi/aspeed_smc.c
A include/hw/misc/emc141x_regs.h
A tests/qtest/emc141x-test.c
M tests/qtest/meson.build
Log Message:
-----------
Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20201210'
into staging
Aspeed patches :
* New device model for EMC1413/EMC1414 temperature sensors (I2C)
* New g220a-bmc Aspeed machine
* couple of Aspeed cleanups
# gpg: Signature made Thu 10 Dec 2020 11:58:10 GMT
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* remotes/legoater/tags/pull-aspeed-20201210:
aspeed: g220a-bmc: Add an FRU
aspeed/smc: Add support for address lane disablement
ast2600: SRAM is 89KB
aspeed: Add support for the g220a-bmc board
hw/misc: add an EMC141{3,4} device model
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/00ef48ff0de9...379e9eaed497
- [Qemu-commits] [qemu/qemu] 5e623f: hw/misc: add an EMC141{3, 4} device model,
Peter Maydell <=