[Qemu-commits] [qemu/qemu] 0dd14e: target/arm: Use kvm_arm_sve_supported in kvm_arm_g...

[Richard Henderson]

  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 0dd14e9555225a2b1f56ccdab5eb99d1684869b9
      
https://github.com/qemu/qemu/commit/0dd14e9555225a2b1f56ccdab5eb99d1684869b9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-08-01 (Mon, 01 Aug 2022)

  Changed paths:
    M target/arm/kvm64.c

  Log Message:
  -----------
  target/arm: Use kvm_arm_sve_supported in kvm_arm_get_host_cpu_features

Indication for support for SVE will not depend on whether we
perform the query on the main kvm_state or the temp vcpu.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220726045828.53697-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: b9e8d68a3982a470b1d42abda90fcd46c01b52bc
      
https://github.com/qemu/qemu/commit/b9e8d68a3982a470b1d42abda90fcd46c01b52bc
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-08-01 (Mon, 01 Aug 2022)

  Changed paths:
    M target/arm/kvm64.c

  Log Message:
  -----------
  target/arm: Set KVM_ARM_VCPU_SVE while probing the host

Because we weren't setting this flag, our probe of ID_AA64ZFR0
was always returning zero.  This also obviates the adjustment
of ID_AA64PFR0, which had sanitized the SVE field.

The effects of the bug are not visible, because the only thing that
ID_AA64ZFR0 is used for within qemu at present is tcg translation.
The other tests for SVE within KVM are via ID_AA64PFR0.SVE.

Reported-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220726045828.53697-3-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 5265d24c981dfdda8d29b44f7e84a514da75eedc
      
https://github.com/qemu/qemu/commit/5265d24c981dfdda8d29b44f7e84a514da75eedc
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-08-01 (Mon, 01 Aug 2022)

  Changed paths:
    M target/arm/kvm64.c

  Log Message:
  -----------
  target/arm: Move sve probe inside kvm >= 4.15 branch

The test for the IF block indicates no ID registers are exposed, much
less host support for SVE.  Move the SVE probe into the ELSE block.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220726045828.53697-4-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 0e0c2cf6de0bc6538840837c63b25817cd417347
      
https://github.com/qemu/qemu/commit/0e0c2cf6de0bc6538840837c63b25817cd417347
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2022-08-01 (Mon, 01 Aug 2022)

  Changed paths:
    M target/arm/kvm64.c

  Log Message:
  -----------
  Merge tag 'pull-target-arm-20220801' of 
https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * Fix KVM SVE ID register probe code

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# gpg: Signature made Mon 01 Aug 2022 08:35:24 AM PDT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" 
[full]

* tag 'pull-target-arm-20220801' of 
https://git.linaro.org/people/pmaydell/qemu-arm:
  target/arm: Move sve probe inside kvm >= 4.15 branch
  target/arm: Set KVM_ARM_VCPU_SVE while probing the host
  target/arm: Use kvm_arm_sve_supported in kvm_arm_get_host_cpu_features

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/b15bdb1d8324...0e0c2cf6de0b