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[Qemu-commits] [qemu/qemu] bb4613: target/arm: Widen cnthctl_el2 to uint


From: Peter Maydell
Subject: [Qemu-commits] [qemu/qemu] bb4613: target/arm: Widen cnthctl_el2 to uint64_t
Date: Mon, 23 Jan 2023 07:17:14 -0800

  Branch: refs/heads/master
  Home:   https://github.com/qemu/qemu
  Commit: bb461330a1ca4d90c67054b493ed408fb7852d74
      
https://github.com/qemu/qemu/commit/bb461330a1ca4d90c67054b493ed408fb7852d74
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M target/arm/cpu.h

  Log Message:
  -----------
  target/arm: Widen cnthctl_el2 to uint64_t

This is a 64-bit register on AArch64, even if the high 44 bits
are RES0.  Because this is defined as ARM_CP_STATE_BOTH, we are
asserting that the cpreg field is 64-bits.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1400
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230115171633.3171890-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 0ec69c460ef7a02596afbe4bd46c9fa954a5f992
      
https://github.com/qemu/qemu/commit/0ec69c460ef7a02596afbe4bd46c9fa954a5f992
  Author: David Reiss <dreiss@meta.com>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M target/arm/m_helper.c

  Log Message:
  -----------
  target/arm: Unify checking for M Main Extension in MRS/MSR

BASEPRI, FAULTMASK, and their _NS equivalents only exist on devices with
the Main Extension.  However, the MRS instruction did not check this,
and the MSR instruction handled it inconsistently (warning BASEPRI, but
silently ignoring writes to BASEPRI_NS).  Unify this behavior and always
warn when reading or writing any of these registers if the extension is
not present.

Signed-off-by: David Reiss <dreiss@meta.com>
Message-id: 167330628518.10497.13100425787268927786-0@git.sr.ht
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: da8df26d2ea7eb1bfd6cc7fec37aabf6137f385d
      
https://github.com/qemu/qemu/commit/da8df26d2ea7eb1bfd6cc7fec37aabf6137f385d
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M hw/arm/musicpal.c
    M hw/i2c/bitbang_i2c.c
    M include/hw/i2c/bitbang_i2c.h

  Log Message:
  -----------
  hw/i2c/bitbang_i2c: Define TYPE_GPIO_I2C in public header

Define TYPE_GPIO_I2C in the public "hw/i2c/bitbang_i2c.h"
header and use it in hw/arm/musicpal.c.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Corey Minyard <cminyard@mvista.com>
Message-id: 20230111085016.44551-2-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 2b9339d3b4642f57fafac2a2312bda68377da740
      
https://github.com/qemu/qemu/commit/2b9339d3b4642f57fafac2a2312bda68377da740
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M hw/i2c/bitbang_i2c.c

  Log Message:
  -----------
  hw/i2c/bitbang_i2c: Remove unused dummy MemoryRegion

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Corey Minyard <cminyard@mvista.com>
Message-id: 20230111085016.44551-3-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: dc575b5e0300a7a375b4e4501a17ada21e9a6d10
      
https://github.com/qemu/qemu/commit/dc575b5e0300a7a375b4e4501a17ada21e9a6d10
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M hw/i2c/bitbang_i2c.c

  Log Message:
  -----------
  hw/i2c/bitbang_i2c: Change state calling bitbang_i2c_set_state() helper

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Corey Minyard <cminyard@mvista.com>
Message-id: 20230111085016.44551-4-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 1e5b1899ccea8b69e3393c7ed2040aef8b33a9e8
      
https://github.com/qemu/qemu/commit/1e5b1899ccea8b69e3393c7ed2040aef8b33a9e8
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M hw/i2c/bitbang_i2c.c
    M hw/i2c/trace-events

  Log Message:
  -----------
  hw/i2c/bitbang_i2c: Trace state changes

Trace bitbang state machine changes with trace events.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Corey Minyard <cminyard@mvista.com>
Message-id: 20230111085016.44551-5-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: c166e592a7457e0ac3398cd14ba543bce032c88c
      
https://github.com/qemu/qemu/commit/c166e592a7457e0ac3398cd14ba543bce032c88c
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M hw/i2c/bitbang_i2c.c
    M hw/i2c/trace-events

  Log Message:
  -----------
  hw/i2c/bitbang_i2c: Convert DPRINTF() to trace events

Convert the remaining DPRINTF debug macro uses to tracepoints.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Corey Minyard <cminyard@mvista.com>
Message-id: 20230111085016.44551-6-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 280b9ecbc5f85a5b936091580c9096bf0c248da8
      
https://github.com/qemu/qemu/commit/280b9ecbc5f85a5b936091580c9096bf0c248da8
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M hw/i2c/versatile_i2c.c

  Log Message:
  -----------
  hw/i2c/versatile_i2c: Drop useless casts from void * to pointer

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230110082508.24038-2-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 92518611acef9c44b215a784c71c5766e3ca6fac
      
https://github.com/qemu/qemu/commit/92518611acef9c44b215a784c71c5766e3ca6fac
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M hw/i2c/versatile_i2c.c
    M include/hw/i2c/arm_sbcon_i2c.h

  Log Message:
  -----------
  hw/i2c/versatile_i2c: Replace VersatileI2CState -> ArmSbconI2CState

In order to rename TYPE_VERSATILE_I2C as TYPE_ARM_SBCON_I2C
(the formal ARM naming), start renaming its state.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230110082508.24038-3-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 550da1cc22c49f0df427232be29484230d15029b
      
https://github.com/qemu/qemu/commit/550da1cc22c49f0df427232be29484230d15029b
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M hw/arm/realview.c
    M hw/arm/versatilepb.c
    M hw/arm/vexpress.c
    M hw/i2c/versatile_i2c.c
    M include/hw/i2c/arm_sbcon_i2c.h

  Log Message:
  -----------
  hw/i2c/versatile_i2c: Replace TYPE_VERSATILE_I2C -> TYPE_ARM_SBCON_I2C

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230110082508.24038-4-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: f6cf2eb8ec6d2d2e3e5fd51147079228c65833bd
      
https://github.com/qemu/qemu/commit/f6cf2eb8ec6d2d2e3e5fd51147079228c65833bd
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M hw/i2c/versatile_i2c.c

  Log Message:
  -----------
  hw/i2c/versatile_i2c: Use ARM_SBCON_I2C() macro

ARM_SBCON_I2C() macro and ArmSbconI2CState typedef are
already declared via the QOM DECLARE_INSTANCE_CHECKER()
macro in "hw/i2c/arm_sbcon_i2c.h". Drop the VERSATILE_I2C
declarations from versatile_i2c.c.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230110082508.24038-5-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 500a64d82b4cb533bcacaaadcf998c906e52a80a
      
https://github.com/qemu/qemu/commit/500a64d82b4cb533bcacaaadcf998c906e52a80a
  Author: Philippe Mathieu-Daudé <philmd@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M MAINTAINERS
    M hw/arm/Kconfig
    M hw/i2c/Kconfig
    A hw/i2c/arm_sbcon_i2c.c
    M hw/i2c/meson.build
    R hw/i2c/versatile_i2c.c

  Log Message:
  -----------
  hw/i2c/versatile_i2c: Rename versatile_i2c -> arm_sbcon_i2c

This device model started with the Versatile board, named
TYPE_VERSATILE_I2C, then ended up renamed TYPE_ARM_SBCON_I2C
as per the official "ARM SBCon two-wire serial bus interface"
description from:
https://developer.arm.com/documentation/dui0440/b/programmer-s-reference/two-wire-serial-bus-interface--sbcon

Use the latter name as a better description.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230110082508.24038-6-philmd@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 535ca76425fc1ffa4311b3a47518b06c596a55c6
      
https://github.com/qemu/qemu/commit/535ca76425fc1ffa4311b3a47518b06c596a55c6
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm/sme: Reorg SME access handling in handle_msr_i()

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230112102436.1913-2-philmd@linaro.org
Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 3c9ee548948870c14235e3fa8fb235c0c1c20822
      
https://github.com/qemu/qemu/commit/3c9ee548948870c14235e3fa8fb235c0c1c20822
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M target/arm/sme_helper.c
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm/sme: Rebuild hflags in set_pstate() helpers

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230112102436.1913-3-philmd@linaro.org
Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 2a8af3825958e5d8c98b3ca92ac42a10e25db9e1
      
https://github.com/qemu/qemu/commit/2a8af3825958e5d8c98b3ca92ac42a10e25db9e1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M linux-user/aarch64/cpu_loop.c
    M linux-user/aarch64/signal.c
    M target/arm/cpu.h
    M target/arm/helper.c
    M target/arm/sme_helper.c

  Log Message:
  -----------
  target/arm/sme: Introduce aarch64_set_svcr()

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230112102436.1913-4-philmd@linaro.org
Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 7f2a01e7368f960fadea38f437d0f6de7f249686
      
https://github.com/qemu/qemu/commit/7f2a01e7368f960fadea38f437d0f6de7f249686
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M linux-user/aarch64/cpu_loop.c
    M linux-user/aarch64/signal.c
    M target/arm/cpu.h
    M target/arm/helper.c
    M target/arm/sme_helper.c

  Log Message:
  -----------
  target/arm/sme: Reset SVE state in aarch64_set_svcr()

Move arm_reset_sve_state() calls to aarch64_set_svcr().

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230112102436.1913-5-philmd@linaro.org
Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: fccb49182e23bd359092f7ab09bc7e60a0fff71a
      
https://github.com/qemu/qemu/commit/fccb49182e23bd359092f7ab09bc7e60a0fff71a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M target/arm/helper.c
    M target/arm/sme_helper.c

  Log Message:
  -----------
  target/arm/sme: Reset ZA state in aarch64_set_svcr()

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230112102436.1913-6-philmd@linaro.org
Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: f4318557149184d6dac99e561acabcb602a84ee1
      
https://github.com/qemu/qemu/commit/f4318557149184d6dac99e561acabcb602a84ee1
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M linux-user/aarch64/cpu_loop.c
    M linux-user/aarch64/signal.c
    M target/arm/helper.c
    M target/arm/sme_helper.c

  Log Message:
  -----------
  target/arm/sme: Rebuild hflags in aarch64_set_svcr()

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230112102436.1913-7-philmd@linaro.org
Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 5c922ec5b136b452fe9d21e7581c99554ce650ed
      
https://github.com/qemu/qemu/commit/5c922ec5b136b452fe9d21e7581c99554ce650ed
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M target/arm/helper-sme.h
    M target/arm/helper.c
    M target/arm/sme_helper.c
    M target/arm/translate-a64.c

  Log Message:
  -----------
  target/arm/sme: Unify set_pstate() SM/ZA helpers as set_svcr()

Unify the two helper_set_pstate_{sm,za} in this function.
Do not call helper_* functions from svcr_write.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20230112102436.1913-8-philmd@linaro.org
Message-Id: <20230112004322.161330-1-richard.henderson@linaro.org>
[PMD: Split patch in multiple tiny steps]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 28fb921f02ef46676eb4b8a2eb9fb928f756b208
      
https://github.com/qemu/qemu/commit/28fb921f02ef46676eb4b8a2eb9fb928f756b208
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M target/arm/mte_helper.c

  Log Message:
  -----------
  target/arm: Fix physical address resolution for MTE

Conversion to probe_access_full missed applying the page offset.

Fixes: b8967ddf ("target/arm: Use probe_access_full for MTE")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1416
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230114031213.2970349-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 4a1103afb16efa64600ef0c2b03afe60f689fdc9
      
https://github.com/qemu/qemu/commit/4a1103afb16efa64600ef0c2b03afe60f689fdc9
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M target/arm/ptw.c

  Log Message:
  -----------
  target/arm: Fix in_debug path in S1_ptw_translate

During the conversion, the test against get_phys_addr_lpae got inverted,
meaning that successful translations went to the 'failed' label.

Cc: qemu-stable@nongnu.org
Fixes: f3639a64f60 ("target/arm: Use softmmu tlbs for page table walking")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1417
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230114054605.2977022-1-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 1e5da7e55332c76da2057e6d5298d7bf1733f104
      
https://github.com/qemu/qemu/commit/1e5da7e55332c76da2057e6d5298d7bf1733f104
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M target/arm/m_helper.c

  Log Message:
  -----------
  target/arm: Don't set EXC_RETURN.ES if Security Extension not present

In v7m_exception_taken(), for v8M we set the EXC_RETURN.ES bit if
either the exception targets Secure or if the CPU doesn't implement
the Security Extension.  This is incorrect: the v8M Arm ARM specifies
that the ES bit should be RES0 if the Security Extension is not
implemented, and the pseudocode agrees.

Remove the incorrect condition, so that we leave the ES bit 0
if the Security Extension isn't implemented.

This doesn't have any guest-visible effects for our current set of
emulated CPUs, because all our v8M CPUs implement the Security
Extension; but it's worth fixing in case we add a v8M CPU without
the extension in future.

Reported-by: Igor Kotrasinski <i.kotrasinsk@samsung.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


  Commit: 5fc83f112866c4a136c36fd33e62c31228194bde
      
https://github.com/qemu/qemu/commit/5fc83f112866c4a136c36fd33e62c31228194bde
  Author: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M target/arm/cpu.h
    M target/arm/debug_helper.c

  Log Message:
  -----------
  target/arm: implement DBGCLAIM registers

The architecture does not define any functionality for the CLAIM tag bits.
So we will just keep the raw bits, as per spec.

Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230120155929.32384-2-eiakovlev@linux.microsoft.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: b3aa2f21284d1d2713d0eb0253001eeebad3d582
      
https://github.com/qemu/qemu/commit/b3aa2f21284d1d2713d0eb0253001eeebad3d582
  Author: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M target/arm/debug_helper.c

  Log Message:
  -----------
  target/arm: provide stubs for more external debug registers

Qemu doesn't implement Debug Communication Channel, as well as the rest
of external debug interface. However, Microsoft Hyper-V in tries to
access some of those registers during an EL2 context switch.

Since there is no architectural way to not advertise support for external
debug, provide RAZ/WI stubs for OSDTRRX_EL1, OSDTRTX_EL1 and OSECCR_EL1
registers in the same way the rest of DCM is currently done. Do account
for access traps though with access_tda.

Signed-off-by: Evgeny Iakovlev <eiakovlev@linux.microsoft.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230120155929.32384-3-eiakovlev@linux.microsoft.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 0371fa90a1b65b1536b3ff7ba583e4119c363eea
      
https://github.com/qemu/qemu/commit/0371fa90a1b65b1536b3ff7ba583e4119c363eea
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M target/arm/translate.c

  Log Message:
  -----------
  target/arm: Reorg do_coproc_insn

Move the ri == NULL case to the top of the function and return.
This allows the else to be removed and the code unindented.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20230106194451.1213153-2-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 3b07a936d3bfe97b07ddffcfbb532985a88033dd
      
https://github.com/qemu/qemu/commit/3b07a936d3bfe97b07ddffcfbb532985a88033dd
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M target/arm/helper.h
    M target/arm/op_helper.c
    M target/arm/translate-a64.c
    M target/arm/translate.c
    M target/arm/translate.h

  Log Message:
  -----------
  target/arm: Look up ARMCPRegInfo at runtime

Do not encode the pointer as a constant in the opcode stream.
This pointer is specific to the cpu that first generated the
translation, which runs into problems with both hot-pluggable
cpus and user-only threads, as cpus are removed. It's also a
potential correctness issue in the theoretical case of a
slightly-heterogenous system, because if CPU 0 generates a
TB and then CPU 1 executes it, CPU 1 will end up using CPU 0's
hash table, which might have a wrong set of registers in it.
(All our current systems are either completely homogenous,
M-profile, or have CPUs sufficiently different that they
wouldn't be sharing TBs anyway because the differences would
show up in the TB flags, so the correctness issue is only
theoretical, not practical.)

Perform the lookup in either helper_access_check_cp_reg,
or a new helper_lookup_cp_reg.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230106194451.1213153-3-richard.henderson@linaro.org
[PMM: added note in commit message about correctness issue]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


  Commit: 00b1faea41d283e931256aa78aa975a369ec3ae6
      
https://github.com/qemu/qemu/commit/00b1faea41d283e931256aa78aa975a369ec3ae6
  Author: Peter Maydell <peter.maydell@linaro.org>
  Date:   2023-01-23 (Mon, 23 Jan 2023)

  Changed paths:
    M MAINTAINERS
    M hw/arm/Kconfig
    M hw/arm/musicpal.c
    M hw/arm/realview.c
    M hw/arm/versatilepb.c
    M hw/arm/vexpress.c
    M hw/i2c/Kconfig
    A hw/i2c/arm_sbcon_i2c.c
    M hw/i2c/bitbang_i2c.c
    M hw/i2c/meson.build
    M hw/i2c/trace-events
    R hw/i2c/versatile_i2c.c
    M include/hw/i2c/arm_sbcon_i2c.h
    M include/hw/i2c/bitbang_i2c.h
    M linux-user/aarch64/cpu_loop.c
    M linux-user/aarch64/signal.c
    M target/arm/cpu.h
    M target/arm/debug_helper.c
    M target/arm/helper-sme.h
    M target/arm/helper.c
    M target/arm/helper.h
    M target/arm/m_helper.c
    M target/arm/mte_helper.c
    M target/arm/op_helper.c
    M target/arm/ptw.c
    M target/arm/sme_helper.c
    M target/arm/translate-a64.c
    M target/arm/translate.c
    M target/arm/translate.h

  Log Message:
  -----------
  Merge tag 'pull-target-arm-20230123' of 
https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
 * Widen cnthctl_el2 to uint64_t
 * Unify checking for M Main Extension in MRS/MSR
 * bitbang_i2c, versatile_i2c: code cleanups
 * SME: refactor SME SM/ZA handling
 * Fix physical address resolution for MTE
 * Fix in_debug path in S1_ptw_translate
 * Don't set EXC_RETURN.ES if Security Extension not present
 * Implement DBGCLAIM registers
 * Provide stubs for more external debug registers
 * Look up ARMCPRegInfo at runtime, not translate time

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# gpg: Signature made Mon 23 Jan 2023 13:35:00 GMT
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" 
[ultimate]
# gpg:                 aka "Peter Maydell <peter@archaic.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20230123' of 
https://git.linaro.org/people/pmaydell/qemu-arm: (26 commits)
  target/arm: Look up ARMCPRegInfo at runtime
  target/arm: Reorg do_coproc_insn
  target/arm: provide stubs for more external debug registers
  target/arm: implement DBGCLAIM registers
  target/arm: Don't set EXC_RETURN.ES if Security Extension not present
  target/arm: Fix in_debug path in S1_ptw_translate
  target/arm: Fix physical address resolution for MTE
  target/arm/sme: Unify set_pstate() SM/ZA helpers as set_svcr()
  target/arm/sme: Rebuild hflags in aarch64_set_svcr()
  target/arm/sme: Reset ZA state in aarch64_set_svcr()
  target/arm/sme: Reset SVE state in aarch64_set_svcr()
  target/arm/sme: Introduce aarch64_set_svcr()
  target/arm/sme: Rebuild hflags in set_pstate() helpers
  target/arm/sme: Reorg SME access handling in handle_msr_i()
  hw/i2c/versatile_i2c: Rename versatile_i2c -> arm_sbcon_i2c
  hw/i2c/versatile_i2c: Use ARM_SBCON_I2C() macro
  hw/i2c/versatile_i2c: Replace TYPE_VERSATILE_I2C -> TYPE_ARM_SBCON_I2C
  hw/i2c/versatile_i2c: Replace VersatileI2CState -> ArmSbconI2CState
  hw/i2c/versatile_i2c: Drop useless casts from void * to pointer
  hw/i2c/bitbang_i2c: Convert DPRINTF() to trace events
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Compare: https://github.com/qemu/qemu/compare/65cc5ccf06a7...00b1faea41d2



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