qemu-commits
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Qemu-commits] [qemu/qemu] 5d4105: vhost: fix possible wrap in SVQ descr


From: Richard Henderson
Subject: [Qemu-commits] [qemu/qemu] 5d4105: vhost: fix possible wrap in SVQ descriptor ring
Date: Fri, 19 May 2023 08:55:17 -0700

  Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 5d410557dea452f6231a7c66155e29a37e168528
      
https://github.com/qemu/qemu/commit/5d410557dea452f6231a7c66155e29a37e168528
  Author: Hawkins Jiawei <yin31149@gmail.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/virtio/vhost-shadow-virtqueue.c
    M hw/virtio/vhost-shadow-virtqueue.h

  Log Message:
  -----------
  vhost: fix possible wrap in SVQ descriptor ring

QEMU invokes vhost_svq_add() when adding a guest's element
into SVQ. In vhost_svq_add(), it uses vhost_svq_available_slots()
to check whether QEMU can add the element into SVQ. If there is
enough space, then QEMU combines some out descriptors and some
in descriptors into one descriptor chain, and adds it into
`svq->vring.desc` by vhost_svq_vring_write_descs().

Yet the problem is that, `svq->shadow_avail_idx - svq->shadow_used_idx`
in vhost_svq_available_slots() returns the number of occupied elements,
or the number of descriptor chains, instead of the number of occupied
descriptors, which may cause wrapping in SVQ descriptor ring.

Here is an example. In vhost_handle_guest_kick(), QEMU forwards
as many available buffers to device by virtqueue_pop() and
vhost_svq_add_element(). virtqueue_pop() returns a guest's element,
and then this element is added into SVQ by vhost_svq_add_element(),
a wrapper to vhost_svq_add(). If QEMU invokes virtqueue_pop() and
vhost_svq_add_element() `svq->vring.num` times,
vhost_svq_available_slots() thinks QEMU just ran out of slots and
everything should work fine. But in fact, virtqueue_pop() returns
`svq->vring.num` elements or descriptor chains, more than
`svq->vring.num` descriptors due to guest memory fragmentation,
and this causes wrapping in SVQ descriptor ring.

This bug is valid even before marking the descriptors used.
If the guest memory is fragmented, SVQ must add chains
so it can try to add more descriptors than possible.

This patch solves it by adding `num_free` field in
VhostShadowVirtqueue structure and updating this field
in vhost_svq_add() and vhost_svq_get_buf(), to record
the number of free descriptors.

Fixes: 100890f7ca ("vhost: Shadow virtqueue buffers forwarding")
Signed-off-by: Hawkins Jiawei <yin31149@gmail.com>
Acked-by: Eugenio Pérez <eperezma@redhat.com>
Message-Id: <20230509084817.3973-1-yin31149@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Tested-by: Lei Yang <leiyang@redhat.com>


  Commit: 71ba92f3488b64bd5c81e2872c56e88cea21bb95
      
https://github.com/qemu/qemu/commit/71ba92f3488b64bd5c81e2872c56e88cea21bb95
  Author: Hao Zeng <zenghao@kylinos.cn>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/cxl/cxl-cdat.c

  Log Message:
  -----------
  hw/cxl: cdat: Fix open file not closed in ct3_load_cdat()

Open file descriptor not closed in error paths. Fix by replace
open coded handling of read of whole file into a buffer with
g_file_get_contents()

Fixes: aba578bdac ("hw/cxl: CDAT Data Object Exchange implementation")
Signed-off-by: Zeng Hao <zenghao@kylinos.cn>
Suggested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Suggested-by: Jonathan Cameron via <qemu-devel@nongnu.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

--
Changes since v5:
- Drop if guard on g_free() as per checkpatch warning.
Message-Id: <20230421132020.7408-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 7b22a3218ad0b8388c8bf20d394e3220b2fc8798
      
https://github.com/qemu/qemu/commit/7b22a3218ad0b8388c8bf20d394e3220b2fc8798
  Author: Jonathan Cameron <Jonathan.Cameron@huawei.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/cxl/cxl-cdat.c
    M hw/mem/cxl_type3.c
    M hw/pci-bridge/cxl_upstream.c

  Log Message:
  -----------
  hw/cxl: cdat: Fix failure to free buffer in erorr paths

The failure paths in CDAT file loading did not clear up properly.
Change to using g_auto_free and a local pointer for the buffer to
ensure this function has no side effects on error.
Also drop some unnecessary checks that can not fail.

Cleanup properly after a failure to load a CDAT file.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230421132020.7408-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: ca4750583a597e97cbf8cec008d228f95d22c426
      
https://github.com/qemu/qemu/commit/ca4750583a597e97cbf8cec008d228f95d22c426
  Author: Brice Goglin <Brice.Goglin@inria.fr>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M docs/system/devices/cxl.rst

  Log Message:
  -----------
  docs/cxl: fix some typos

Signed-off-by: Brice Goglin <Brice.Goglin@inria.fr>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230421134507.26842-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 9830ea6126c6a3b3ea7af720d98aa7717dba59eb
      
https://github.com/qemu/qemu/commit/9830ea6126c6a3b3ea7af720d98aa7717dba59eb
  Author: Raghu H <raghuhack78@gmail.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M docs/system/devices/cxl.rst

  Log Message:
  -----------
  docs/cxl: Remove incorrect CXL type 3 size parameter

cxl-type3 memory size is read directly from the provided memory backed end
device. Remove non existent size option

Signed-off-by: Raghu H <raghuhack78@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230421134507.26842-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 0795b98f096b876a36e2c45adb42c2004655011e
      
https://github.com/qemu/qemu/commit/0795b98f096b876a36e2c45adb42c2004655011e
  Author: Raghu H <raghuhack78@gmail.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M docs/system/devices/cxl.rst

  Log Message:
  -----------
  docs/cxl: Replace unsupported AARCH64 with x86_64

Currently Qemu CXL emulation support is not availabe on AARCH64 but its
available with qemu x86_64 architecture, updating the document to reflect
the supported platform.

Signed-off-by: Raghu H <raghuhack78@gmail.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230421134507.26842-4-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 23e1248d7e3cb7331a1cee13ff109a5c52471ec2
      
https://github.com/qemu/qemu/commit/23e1248d7e3cb7331a1cee13ff109a5c52471ec2
  Author: Jonathan Cameron <Jonathan.Cameron@huawei.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/cxl/cxl-component-utils.c

  Log Message:
  -----------
  hw/cxl: drop pointless memory_region_transaction_guards

Not clear what intent was here, but probably based on a misunderstanding
of what these guards are for.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230421135906.3515-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 92ff7cabf97d9942ebaeafed6747dc18c8c1f697
      
https://github.com/qemu/qemu/commit/92ff7cabf97d9942ebaeafed6747dc18c8c1f697
  Author: Jonathan Cameron <Jonathan.Cameron@huawei.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/cxl/cxl-component-utils.c
    M hw/mem/cxl_type3.c

  Log Message:
  -----------
  hw/cxl: Fix endian handling for decoder commit.

Not a real problem yet as all supported architectures are
little endian, but continue to tidy these up when touching
code for other reasons.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Message-Id: <20230421135906.3515-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 823371a630599346fd04d541f19b52e72ee84f7e
      
https://github.com/qemu/qemu/commit/823371a630599346fd04d541f19b52e72ee84f7e
  Author: Jonathan Cameron <Jonathan.Cameron@huawei.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/cxl/cxl-component-utils.c
    M hw/mem/cxl_type3.c

  Log Message:
  -----------
  hw/cxl: Fix incorrect reset of commit and associated clearing of committed.

The hardware clearing the commit bit is not spec compliant.
Clearing of committed bit when commit is cleared is not specifically
stated in the CXL spec, but is the expected (and simplest) permitted
behaviour so use that for QEMU emulation.

Reviewed-by: Fan Ni <fan.ni@samsung.com>
Tested-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

--
v2: Picked up tags.
Message-Id: <20230421135906.3515-4-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 847ea4e746a1cac861ffe6b8256052131e8e3b93
      
https://github.com/qemu/qemu/commit/847ea4e746a1cac861ffe6b8256052131e8e3b93
  Author: Gregory Price <gourry.memverge@gmail.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M tests/qtest/cxl-test.c

  Log Message:
  -----------
  tests/qtest/cxl-test: whitespace, line ending cleanup

Defines are starting to exceed line length limits, align them for
cleanliness before making modifications.

Signed-off-by: Gregory Price <gregory.price@memverge.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230421160827.2227-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 3521176526a901bd2a8418ce6470df0e38ca4e11
      
https://github.com/qemu/qemu/commit/3521176526a901bd2a8418ce6470df0e38ca4e11
  Author: Jonathan Cameron <Jonathan.Cameron@huawei.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/mem/cxl_type3.c

  Log Message:
  -----------
  hw/mem: Use memory_region_size() in cxl_type3

Accessors prefered over direct use of int128_get64() as they
clamp out of range values.  None are expected here but
cleaner to always use the accessor than mix and match.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Message-Id: <20230421160827.2227-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Gregory Price <gregory.price@memverge.com>


  Commit: adacc814f541af9281c922e750d8ba4b90c1a73e
      
https://github.com/qemu/qemu/commit/adacc814f541af9281c922e750d8ba4b90c1a73e
  Author: Gregory Price <gregory.price@memverge.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M docs/about/deprecated.rst
    M docs/system/devices/cxl.rst
    M hw/cxl/cxl-mailbox-utils.c
    M hw/mem/cxl_type3.c
    M include/hw/cxl/cxl_device.h
    M tests/qtest/bios-tables-test.c
    M tests/qtest/cxl-test.c

  Log Message:
  -----------
  hw/cxl: Multi-Region CXL Type-3 Devices (Volatile and Persistent)

This commit enables each CXL Type-3 device to contain one volatile
memory region and one persistent region.

Two new properties have been added to cxl-type3 device initialization:
    [volatile-memdev] and [persistent-memdev]

The existing [memdev] property has been deprecated and will default the
memory region to a persistent memory region (although a user may assign
the region to a ram or file backed region). It cannot be used in
combination with the new [persistent-memdev] property.

Partitioning volatile memory from persistent memory is not yet supported.

Volatile memory is mapped at DPA(0x0), while Persistent memory is mapped
at DPA(vmem->size), per CXL Spec 8.2.9.8.2.0 - Get Partition Info.

Signed-off-by: Gregory Price <gregory.price@memverge.com>
Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Tested-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Message-Id: <20230421160827.2227-4-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 354b09d228e1d04272e126a1edfcc70701af2958
      
https://github.com/qemu/qemu/commit/354b09d228e1d04272e126a1edfcc70701af2958
  Author: Eric DeVolder <eric.devolder@oracle.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M tests/qtest/bios-tables-test-allowed-diff.h

  Log Message:
  -----------
  ACPI: bios-tables-test.c step 2 (allowed-diff entries)

Following the guidelines in tests/qtest/bios-tables-test.c,
set up bios-tables-test-allowed-diff.h to ignore the
imminent changes to the APIC tables, per step 2.

Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
Message-Id: <20230517162545.2191-2-eric.devolder@oracle.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Ani Sinha <ani@anisinha.ca>


  Commit: 6da94e277cd6eaf627dcd2d50ca795c7a272b8aa
      
https://github.com/qemu/qemu/commit/6da94e277cd6eaf627dcd2d50ca795c7a272b8aa
  Author: Eric DeVolder <eric.devolder@oracle.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/i386/acpi-common.c

  Log Message:
  -----------
  ACPI: i386: bump to MADT to revision 3

Currently i386 QEMU generates MADT revision 3, and reports
MADT revision 1. Set .revision to 3 to match reality.

Link: https://lore.kernel.org/linux-acpi/20230327191026.3454-1-eric.devolder@ora
cle.com/T/#t
Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
Reviewed-by: Ani Sinha <anisinha@redhat.com>
Message-Id: <20230517162545.2191-3-eric.devolder@oracle.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>


  Commit: 1141159cb471b89a63c256902f315bcf8dcf7d5e
      
https://github.com/qemu/qemu/commit/1141159cb471b89a63c256902f315bcf8dcf7d5e
  Author: Eric DeVolder <eric.devolder@oracle.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M tests/data/acpi/microvm/APIC
    M tests/data/acpi/microvm/APIC.ioapic2
    M tests/data/acpi/microvm/APIC.pcie
    M tests/data/acpi/pc/APIC
    M tests/data/acpi/pc/APIC.acpihmat
    M tests/data/acpi/pc/APIC.cphp
    M tests/data/acpi/pc/APIC.dimmpxm
    M tests/data/acpi/q35/APIC
    M tests/data/acpi/q35/APIC.acpihmat
    M tests/data/acpi/q35/APIC.acpihmat-noinitiator
    M tests/data/acpi/q35/APIC.core-count2
    M tests/data/acpi/q35/APIC.cphp
    M tests/data/acpi/q35/APIC.dimmpxm
    M tests/data/acpi/q35/APIC.xapic
    M tests/qtest/bios-tables-test-allowed-diff.h

  Log Message:
  -----------
  ACPI: bios-tables-test.c step 5 (update expected table binaries)

Following the guidelines in tests/qtest/bios-tables-test.c, this
is step 5 and 6.

An examination of all the files impacted (as listed in
bios-tables-test-allowe-diff.h) shows only the MADT/APIC tables
bumping revision from 1 to 3, and a corresponding change to
the checksum. The below diff is typical:

 --- /tmp/asl-1F9641.dsl        2023-05-16 15:18:31.292579156 -0400
 +++ /tmp/asl-GVD741.dsl        2023-05-16 15:18:31.291579149 -0400
 @@ -1,32 +1,32 @@
  /*
   * Intel ACPI Component Architecture
   * AML/ASL+ Disassembler version 20230331 (64-bit version)
   * Copyright (c) 2000 - 2023 Intel Corporation
   *
 - * Disassembly of tests/data/acpi/pc/APIC, Tue May 16 15:18:31 2023
 + * Disassembly of /tmp/aml-R4D741, Tue May 16 15:18:31 2023
   *
   * ACPI Data Table [APIC]
   *
   * Format: [HexOffset DecimalOffset ByteLength]  FieldName : FieldValue (in 
hex)
   */

  [000h 0000 004h]                   Signature : "APIC"    [Multiple APIC 
Description Table (MADT)]
  [004h 0004 004h]                Table Length : 00000078
 -[008h 0008 001h]                    Revision : 01
 -[009h 0009 001h]                    Checksum : 8A
 +[008h 0008 001h]                    Revision : 03
 +[009h 0009 001h]                    Checksum : 88
  [00Ah 0010 006h]                      Oem ID : "BOCHS "
  [010h 0016 008h]                Oem Table ID : "BXPC    "
  [018h 0024 004h]                Oem Revision : 00000001
  [01Ch 0028 004h]             Asl Compiler ID : "BXPC"
  [020h 0032 004h]       Asl Compiler Revision : 00000001

  [024h 0036 004h]          Local Apic Address : FEE00000
  [028h 0040 004h]       Flags (decoded below) : 00000001
                           PC-AT Compatibility : 1

  [02Ch 0044 001h]               Subtable Type : 00 [Processor Local APIC]
  [02Dh 0045 001h]                      Length : 08
  [02Eh 0046 001h]                Processor ID : 00
  [02Fh 0047 001h]               Local Apic ID : 00
  [030h 0048 004h]       Flags (decoded below) : 00000001
                             Processor Enabled : 1
 @@ -81,24 +81,24 @@
  [06Bh 0107 001h]                      Source : 0B
  [06Ch 0108 004h]                   Interrupt : 0000000B
  [070h 0112 002h]       Flags (decoded below) : 000D
                                      Polarity : 1
                                  Trigger Mode : 3

  [072h 0114 001h]               Subtable Type : 04 [Local APIC NMI]
  [073h 0115 001h]                      Length : 06
  [074h 0116 001h]                Processor ID : FF
  [075h 0117 002h]       Flags (decoded below) : 0000
                                      Polarity : 0
                                  Trigger Mode : 0
  [077h 0119 001h]        Interrupt Input LINT : 01

  Raw Table Data: Length 120 (0x78)

 -    0000: 41 50 49 43 78 00 00 00 01 8A 42 4F 43 48 53 20  // APICx.....BOCHS
 +    0000: 41 50 49 43 78 00 00 00 03 88 42 4F 43 48 53 20  // APICx.....BOCHS
      0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43  // BXPC    ....BXPC
      0020: 01 00 00 00 00 00 E0 FE 01 00 00 00 00 08 00 00  // ................
      0030: 01 00 00 00 01 0C 00 00 00 00 C0 FE 00 00 00 00  // ................
      0040: 02 0A 00 00 02 00 00 00 00 00 02 0A 00 05 05 00  // ................
      0050: 00 00 0D 00 02 0A 00 09 09 00 00 00 0D 00 02 0A  // ................
      0060: 00 0A 0A 00 00 00 0D 00 02 0A 00 0B 0B 00 00 00  // ................
      0070: 0D 00 04 06 FF 00 00 01                          // ........

Signed-off-by: Eric DeVolder <eric.devolder@oracle.com>
Message-Id: <20230517162545.2191-4-eric.devolder@oracle.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Acked-by: Ani Sinha <anisinha@redhat.com>


  Commit: 4ab049c7e68919b92a5ece5ad5baa52d0a963676
      
https://github.com/qemu/qemu/commit/4ab049c7e68919b92a5ece5ad5baa52d0a963676
  Author: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/pci/pci.c

  Log Message:
  -----------
  pci: pci_add_option_rom(): improve style

Fix over-80 lines and missing curly brackets for if-operators, which
are required by QEMU coding style.

Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20230515125229.44836-2-vsementsov@yandex-team.ru>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>


  Commit: 5b52692f9d258d0e2637234832dc00042de03a4d
      
https://github.com/qemu/qemu/commit/5b52692f9d258d0e2637234832dc00042de03a4d
  Author: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/pci/pci.c

  Log Message:
  -----------
  pci: pci_add_option_rom(): refactor: use g_autofree for path variable

Signed-off-by: Vladimir Sementsov-Ogievskiy <vsementsov@yandex-team.ru>
Reviewed-by: David Hildenbrand <david@redhat.com>
Message-Id: <20230515125229.44836-3-vsementsov@yandex-team.ru>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>


  Commit: 6f8be29ec17d44496b9ed67599bceaaba72d1864
      
https://github.com/qemu/qemu/commit/6f8be29ec17d44496b9ed67599bceaaba72d1864
  Author: Stefan Hajnoczi <stefanha@redhat.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/virtio/vhost-user.c

  Log Message:
  -----------
  vhost-user: send SET_STATUS 0 after GET_VRING_BASE

Setting the VIRTIO Device Status Field to 0 resets the device. The
device's state is lost, including the vring configuration.

vhost-user.c currently sends SET_STATUS 0 before GET_VRING_BASE. This
risks confusion about the lifetime of the vhost-user state (e.g. vring
last_avail_idx) across VIRTIO device reset.

Eugenio Pérez <eperezma@redhat.com> adjusted the order for vhost-vdpa.c
in commit c3716f260bff ("vdpa: move vhost reset after get vring base")
and in that commit description suggested doing the same for vhost-user
in the future.

Go ahead and adjust vhost-user.c now. I ran various online code searches
to identify vhost-user backends implementing SET_STATUS. It seems only
DPDK implements SET_STATUS and Yajun Wu <yajunw@nvidia.com> has
confirmed that it is safe to make this change.

Fixes: commit 923b8921d210763359e96246a58658ac0db6c645 ("vhost-user: Support 
vhost_dev_start")
Cc: Michael S. Tsirkin <mst@redhat.com>
Cc: Cindy Lu <lulu@redhat.com>
Cc: Yajun Wu <yajunw@nvidia.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20230501230409.274178-1-stefanha@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Yajun Wu <yajunw@nvidia.com>
Acked-by: Eugenio Pérez <eperezma@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 5ed3dabe57dd9f4c007404345e5f5bf0e347317f
      
https://github.com/qemu/qemu/commit/5ed3dabe57dd9f4c007404345e5f5bf0e347317f
  Author: Leonardo Bras <leobras@redhat.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/core/machine.c
    M hw/pci/pci.c
    M hw/pci/pcie_aer.c
    M include/hw/pci/pci.h

  Log Message:
  -----------
  hw/pci: Disable PCI_ERR_UNCOR_MASK register for machine type < 8.0

Since it's implementation on v8.0.0-rc0, having the PCI_ERR_UNCOR_MASK
set for machine types < 8.0 will cause migration to fail if the target
QEMU version is < 8.0.0 :

qemu-system-x86_64: get_pci_config_device: Bad config data: i=0x10a read: 40 
device: 0 cmask: ff wmask: 0 w1cmask:0
qemu-system-x86_64: Failed to load PCIDevice:config
qemu-system-x86_64: Failed to load e1000e:parent_obj
qemu-system-x86_64: error while loading state for instance 0x0 of device 
'0000:00:02.0/e1000e'
qemu-system-x86_64: load of migration failed: Invalid argument

The above test migrated a 7.2 machine type from QEMU master to QEMU 7.2.0,
with this cmdline:

./qemu-system-x86_64 -M pc-q35-7.2 [-incoming XXX]

In order to fix this, property x-pcie-err-unc-mask was introduced to
control when PCI_ERR_UNCOR_MASK is enabled. This property is enabled by
default, but is disabled if machine type <= 7.2.

Fixes: 010746ae1d ("hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register")
Suggested-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Leonardo Bras <leobras@redhat.com>
Message-Id: <20230503002701.854329-1-leobras@redhat.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Juan Quintela <quintela@redhat.com>
Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1576
Tested-by: Fiona Ebner <f.ebner@proxmox.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: d5cef02574c126327a6f673c12b8718ce55f80e7
      
https://github.com/qemu/qemu/commit/d5cef02574c126327a6f673c12b8718ce55f80e7
  Author: David Hildenbrand <david@redhat.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/i386/pc.c
    M hw/virtio/virtio-mem.c

  Log Message:
  -----------
  virtio-mem: Default to "unplugged-inaccessible=on" with 8.1 on x86-64

Allowing guests to read unplugged memory simplified the bring-up of
virtio-mem in Linux guests -- which was limited to x86-64 only. On arm64
(which was added later), we never had legacy guests and don't even allow
to configure it, essentially always having "unplugged-inaccessible=on".

At this point, all guests we care about
should be supporting VIRTIO_MEM_F_UNPLUGGED_INACCESSIBLE, so let's
change the default for the 8.1 machine.

This change implies that also memory that supports the shared zeropage
(private anonymous memory) will now require
VIRTIO_MEM_F_UNPLUGGED_INACCESSIBLE in the driver in order to be usable by
the guest -- as default, one can still manually set the
unplugged-inaccessible property.

Disallowing the guest to read unplugged memory will be important for
some future features, such as memslot optimizations or protection of
unplugged memory, whereby we'll actually no longer allow the guest to
even read from unplugged memory.

At some point, we might want to deprecate and remove that property.

Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Richard Henderson <richard.henderson@linaro.org>
Cc: Eduardo Habkost <eduardo@habkost.net>

Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20230503182352.792458-1-david@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: bab105300bdeb7b651dd1b1f666ecb8e44be6d71
      
https://github.com/qemu/qemu/commit/bab105300bdeb7b651dd1b1f666ecb8e44be6d71
  Author: David Hildenbrand <david@redhat.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/virtio/vhost-user.c

  Log Message:
  -----------
  vhost-user: Remove acpi-specific memslot limit

Let's just support 512 memslots on x86-64 and aarch64 as well. The maximum
number of ACPI slots (256) is no longer completely expressive ever since
we supported virtio-based memory devices. Further, we're completely
ignoring other memslots used outside of memory device context, such as
memslots used for boot memory.

Note that the vhost memslot limit in the kernel is usually configured to
be 509. With this change, we prepare vhost-user on the QEMU side to be
closer to that limit, to eventually support ~512 memslots in most vhost
implementations and have less "surprises" when cold/hotplugging vhost
devices while also consuming more memslots than we're currently used to
by memory devices (e.g., once virtio-mem starts using multiple memslots).

Note that most vhost-user implementations only support a small number of
memslots so far, which we can hopefully improve in the near future.

We'll leave the PPC special-case as is for now.

Cc: "Michael S. Tsirkin" <mst@redhat.com>
Cc: Igor Mammedov <imammedo@redhat.com>
Cc: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20230503184144.808478-1-david@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 1fac00f70b3261050af5564b20ca55c1b2a3059a
      
https://github.com/qemu/qemu/commit/1fac00f70b3261050af5564b20ca55c1b2a3059a
  Author: Eugenio Pérez <eperezma@redhat.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/net/virtio-net.c

  Log Message:
  -----------
  virtio-net: not enable vq reset feature unconditionally

The commit 93a97dc5200a ("virtio-net: enable vq reset feature") enables
unconditionally vq reset feature as long as the device is emulated.
This makes impossible to actually disable the feature, and it causes
migration problems from qemu version previous than 7.2.

The entire final commit is unneeded as device system already enable or
disable the feature properly.

This reverts commit 93a97dc5200a95e63b99cb625f20b7ae802ba413.
Fixes: 93a97dc5200a ("virtio-net: enable vq reset feature")
Signed-off-by: Eugenio Pérez <eperezma@redhat.com>

Message-Id: <20230504101447.389398-1-eperezma@redhat.com>
Reviewed-by: Xuan Zhuo <xuanzhuo@linux.alibaba.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 3e69908907f8d3dd20d5753b0777a6e3824ba824
      
https://github.com/qemu/qemu/commit/3e69908907f8d3dd20d5753b0777a6e3824ba824
  Author: Mauro Matteo Cascella <mcascell@redhat.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/virtio/virtio-crypto.c

  Log Message:
  -----------
  virtio-crypto: fix NULL pointer dereference in virtio_crypto_free_request

Ensure op_info is not NULL in case of QCRYPTODEV_BACKEND_ALG_SYM algtype.

Fixes: 0e660a6f90a ("crypto: Introduce RSA algorithm")
Signed-off-by: Mauro Matteo Cascella <mcascell@redhat.com>
Reported-by: Yiming Tao <taoym@zju.edu.cn>
Message-Id: <20230509075317.1132301-1-mcascell@redhat.com>
Reviewed-by: Gonglei <arei.gonglei@huawei.com>
Reviewed-by: zhenwei pi<pizhenwei@bytedance.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 74b5d2b56c85515f1559ee0dfa8289bbb9832d51
      
https://github.com/qemu/qemu/commit/74b5d2b56c85515f1559ee0dfa8289bbb9832d51
  Author: Cindy Lu <lulu@redhat.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/virtio/vhost.c
    M include/hw/virtio/vhost.h

  Log Message:
  -----------
  vhost: expose function vhost_dev_has_iommu()

To support vIOMMU in vdpa, need to exposed the function
vhost_dev_has_iommu, vdpa will use this function to check
if vIOMMU enable.

Signed-off-by: Cindy Lu <lulu@redhat.com>
Message-Id: <20230510054631.2951812-2-lulu@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 3d1e4d34a81a212e234f674e57e73c824d4b131a
      
https://github.com/qemu/qemu/commit/3d1e4d34a81a212e234f674e57e73c824d4b131a
  Author: Cindy Lu <lulu@redhat.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/virtio/vhost-vdpa.c

  Log Message:
  -----------
  vhost_vdpa: fix the input in trace_vhost_vdpa_listener_region_del()

In trace_vhost_vdpa_listener_region_del, the value for llend
should change to int128_get64(int128_sub(llend, int128_one()))

Signed-off-by: Cindy Lu <lulu@redhat.com>
Message-Id: <20230510054631.2951812-3-lulu@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 2fbef6aad892a3e784041fc5a6d5f5bda0565464
      
https://github.com/qemu/qemu/commit/2fbef6aad892a3e784041fc5a6d5f5bda0565464
  Author: Cindy Lu <lulu@redhat.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/virtio/vhost-vdpa.c

  Log Message:
  -----------
  vhost-vdpa: Add check for full 64-bit in region delete

The unmap ioctl doesn't accept a full 64-bit span. So need to
add check for the section's size in vhost_vdpa_listener_region_del().

Signed-off-by: Cindy Lu <lulu@redhat.com>
Message-Id: <20230510054631.2951812-4-lulu@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: bc7b0cac7bf41f24ceb84a03b491f93c378529a4
      
https://github.com/qemu/qemu/commit/bc7b0cac7bf41f24ceb84a03b491f93c378529a4
  Author: Cindy Lu <lulu@redhat.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/virtio/vhost-vdpa.c
    M include/hw/virtio/vhost-vdpa.h

  Log Message:
  -----------
  vhost-vdpa: Add support for vIOMMU.

1. The vIOMMU support will make vDPA can work in IOMMU mode. This
will fix security issues while using the no-IOMMU mode.
To support this feature we need to add new functions for IOMMU MR adds and
deletes.

Also since the SVQ does not support vIOMMU yet, add the check for IOMMU
in vhost_vdpa_dev_start, if the SVQ and IOMMU enable at the same time
the function will return fail.

2. Skip the iova_max check vhost_vdpa_listener_skipped_section(). While
MR is IOMMU, move this check to vhost_vdpa_iommu_map_notify()

Verified in vp_vdpa and vdpa_sim_net driver

Signed-off-by: Cindy Lu <lulu@redhat.com>
Message-Id: <20230510054631.2951812-5-lulu@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 273d65020b04f8a01e4b5cd543aeef1624b17001
      
https://github.com/qemu/qemu/commit/273d65020b04f8a01e4b5cd543aeef1624b17001
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/pci-host/i440fx.c

  Log Message:
  -----------
  hw/pci-host/i440fx: Inline sysbus_add_io()

sysbus_add_io() just wraps memory_region_add_subregion() while also
obscuring where the memory is attached. So use
memory_region_add_subregion() directly and attach it to the existing
memory region s->bus->address_space_io which is set as an alias to
get_system_io() by the pc machine.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20230213162004.2797-2-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>


  Commit: 67b4a74a0743c4cdb78bf884cea2407645530af3
      
https://github.com/qemu/qemu/commit/67b4a74a0743c4cdb78bf884cea2407645530af3
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/pci-host/q35.c

  Log Message:
  -----------
  hw/pci-host/q35: Inline sysbus_add_io()

sysbus_add_io() just wraps memory_region_add_subregion() while also
obscuring where the memory is attached. So use
memory_region_add_subregion() directly and attach it to the existing
memory region s->mch.address_space_io which is set as an alias to
get_system_io() by the q35 machine.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20230213162004.2797-3-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 1ab7167b09446996a8c967c6fe2eb4dcb9f53c87
      
https://github.com/qemu/qemu/commit/1ab7167b09446996a8c967c6fe2eb4dcb9f53c87
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/i386/pc_q35.c

  Log Message:
  -----------
  hw/i386/pc_q35: Reuse machine parameter

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20230213162004.2797-4-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>


  Commit: 1e366da0318bd9fb8cea66914e9682ad6e7d0a94
      
https://github.com/qemu/qemu/commit/1e366da0318bd9fb8cea66914e9682ad6e7d0a94
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c

  Log Message:
  -----------
  hw/i386/pc_{q35,piix}: Reuse MachineClass::desc as SMB product name

No need to repeat the descriptions.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20230213162004.2797-5-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 8631743c0968d11983a3a04939c580160bb79ac3
      
https://github.com/qemu/qemu/commit/8631743c0968d11983a3a04939c580160bb79ac3
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c

  Log Message:
  -----------
  hw/i386/pc_{q35,piix}: Minimize usage of get_system_memory()

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20230213162004.2797-6-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: f9fddaf7ce26acc48fc899673affe957103862a5
      
https://github.com/qemu/qemu/commit/f9fddaf7ce26acc48fc899673affe957103862a5
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/i386/pc.c
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c
    M include/hw/i386/pc.h

  Log Message:
  -----------
  hw/i386/pc: Initialize ram_memory variable directly

Going through pc_memory_init() seems quite complicated for a simple
assignment.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230213162004.2797-7-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 9e57b81861e05b2856ed1c4fbc2d991801c7c777
      
https://github.com/qemu/qemu/commit/9e57b81861e05b2856ed1c4fbc2d991801c7c777
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/pci-host/i440fx.c
    M hw/pci-host/pam.c
    M hw/pci-host/q35.c
    M include/hw/pci-host/pam.h

  Log Message:
  -----------
  hw/pci-host/pam: Make init_pam() usage more readable

Unlike pam_update() which takes the subject -- PAMMemoryRegion -- as
first argument, init_pam() takes it as fifth (!) argument. This makes it
quite hard to figure out what an init_pam() invocation actually
initializes. By moving the subject to the front this should become
clearer.

While at it, lower the DeviceState parameter to Object, also
communicating more clearly that this parameter is just the owner rather
than some (heavy?) dependency.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230213162004.2797-8-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 206e91d143301414df2deb48a411e402414ba6db
      
https://github.com/qemu/qemu/commit/206e91d143301414df2deb48a411e402414ba6db
  Author: Viktor Prutyanov <viktor@daynix.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/virtio/virtio-pci.c
    M include/hw/virtio/virtio.h

  Log Message:
  -----------
  virtio-pci: add handling of PCI ATS and Device-TLB enable/disable

According to PCIe Address Translation Services specification 5.1.3.,
ATS Control Register has Enable bit to enable/disable ATS. Guest may
enable/disable PCI ATS and, accordingly, Device-TLB for the VirtIO PCI
device. So, raise/lower a flag and call a trigger function to pass this
event to a device implementation.

Signed-off-by: Viktor Prutyanov <viktor@daynix.com>
Message-Id: <20230512135122.70403-2-viktor@daynix.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 6a36a4ced803838cbba5f90b1b765d8ef6255115
      
https://github.com/qemu/qemu/commit/6a36a4ced803838cbba5f90b1b765d8ef6255115
  Author: Sebastian Ott <sebott@redhat.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/pci-bridge/Kconfig
    M hw/pci-bridge/meson.build

  Log Message:
  -----------
  hw/pci-bridge: make building pcie-to-pci bridge configurable

Introduce a CONFIG option to build the pcie-to-pci bridge. No
functional change since it's enabled per default for PCIE_PORT=y.

Signed-off-by: Sebastian Ott <sebott@redhat.com>
Message-Id: <72b6599d-6b27-00b5-aac5-2ebc16a2e023@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: b6aab4597173f5d112a8aa0f3ded502cfb7042a9
      
https://github.com/qemu/qemu/commit/b6aab4597173f5d112a8aa0f3ded502cfb7042a9
  Author: Jonathan Cameron <Jonathan.Cameron@huawei.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/cxl/cxl-mailbox-utils.c

  Log Message:
  -----------
  hw/cxl: rename mailbox return code type from ret_code to CXLRetCode

Given the increasing usage of this mailbox return code type, now
is a good time to switch to QEMU style naming.

Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Message-Id: <20230423162013.4535-2-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 547a652fd1e10c2b6a2b9b91084e4c1cea8665a2
      
https://github.com/qemu/qemu/commit/547a652fd1e10c2b6a2b9b91084e4c1cea8665a2
  Author: Ira Weiny <ira.weiny@intel.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/cxl/cxl-device-utils.c
    M hw/cxl/cxl-mailbox-utils.c
    M include/hw/cxl/cxl_device.h

  Log Message:
  -----------
  hw/cxl: Introduce cxl_device_get_timestamp() utility function

There are new users of this functionality coming shortly so factor
it out from the GET_TIMESTAMP mailbox command handling.

Signed-off-by: Ira Weiny <ira.weiny@intel.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

Message-Id: <20230423162013.4535-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: f0bc6bf725428860b479cb771e99bb33a3f5847d
      
https://github.com/qemu/qemu/commit/f0bc6bf725428860b479cb771e99bb33a3f5847d
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/i386/pc.c
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c
    M hw/isa/Kconfig
    M hw/isa/lpc_ich9.c
    M hw/isa/piix3.c
    M include/hw/southbridge/ich9.h
    M include/hw/southbridge/piix.h

  Log Message:
  -----------
  hw/i386/pc: Create RTC controllers in south bridges

Just like in the real hardware (and in PIIX4), create the RTC
controllers in the south bridges.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20230519084734.220480-2-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 87af48a49c0a5663b3fff58c3407393772d3c448
      
https://github.com/qemu/qemu/commit/87af48a49c0a5663b3fff58c3407393772d3c448
  Author: Bernhard Beschow <shentey@gmail.com>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M hw/i386/pc.c
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c
    M include/hw/i386/pc.h

  Log Message:
  -----------
  hw/i386/pc: No need for rtc_state to be an out-parameter

Now that the RTC is created as part of the southbridges it doesn't need
to be an out-parameter any longer.

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230519084734.220480-3-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>


  Commit: 64e63dca08831880e96057a7106fd5b17028641a
      
https://github.com/qemu/qemu/commit/64e63dca08831880e96057a7106fd5b17028641a
  Author: Richard Henderson <richard.henderson@linaro.org>
  Date:   2023-05-19 (Fri, 19 May 2023)

  Changed paths:
    M docs/about/deprecated.rst
    M docs/system/devices/cxl.rst
    M hw/core/machine.c
    M hw/cxl/cxl-cdat.c
    M hw/cxl/cxl-component-utils.c
    M hw/cxl/cxl-device-utils.c
    M hw/cxl/cxl-mailbox-utils.c
    M hw/i386/acpi-common.c
    M hw/i386/pc.c
    M hw/i386/pc_piix.c
    M hw/i386/pc_q35.c
    M hw/isa/Kconfig
    M hw/isa/lpc_ich9.c
    M hw/isa/piix3.c
    M hw/mem/cxl_type3.c
    M hw/net/virtio-net.c
    M hw/pci-bridge/Kconfig
    M hw/pci-bridge/cxl_upstream.c
    M hw/pci-bridge/meson.build
    M hw/pci-host/i440fx.c
    M hw/pci-host/pam.c
    M hw/pci-host/q35.c
    M hw/pci/pci.c
    M hw/pci/pcie_aer.c
    M hw/virtio/vhost-shadow-virtqueue.c
    M hw/virtio/vhost-shadow-virtqueue.h
    M hw/virtio/vhost-user.c
    M hw/virtio/vhost-vdpa.c
    M hw/virtio/vhost.c
    M hw/virtio/virtio-crypto.c
    M hw/virtio/virtio-mem.c
    M hw/virtio/virtio-pci.c
    M include/hw/cxl/cxl_device.h
    M include/hw/i386/pc.h
    M include/hw/pci-host/pam.h
    M include/hw/pci/pci.h
    M include/hw/southbridge/ich9.h
    M include/hw/southbridge/piix.h
    M include/hw/virtio/vhost-vdpa.h
    M include/hw/virtio/vhost.h
    M include/hw/virtio/virtio.h
    M tests/data/acpi/microvm/APIC
    M tests/data/acpi/microvm/APIC.ioapic2
    M tests/data/acpi/microvm/APIC.pcie
    M tests/data/acpi/pc/APIC
    M tests/data/acpi/pc/APIC.acpihmat
    M tests/data/acpi/pc/APIC.cphp
    M tests/data/acpi/pc/APIC.dimmpxm
    M tests/data/acpi/q35/APIC
    M tests/data/acpi/q35/APIC.acpihmat
    M tests/data/acpi/q35/APIC.acpihmat-noinitiator
    M tests/data/acpi/q35/APIC.core-count2
    M tests/data/acpi/q35/APIC.cphp
    M tests/data/acpi/q35/APIC.dimmpxm
    M tests/data/acpi/q35/APIC.xapic
    M tests/qtest/bios-tables-test.c
    M tests/qtest/cxl-test.c

  Log Message:
  -----------
  Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu 
into staging

virtio,pc,pci: fixes, features, cleanups

CXL volatile memory support
More memslots for vhost-user on x86 and ARM.
vIOMMU support for vhost-vdpa
pcie-to-pci bridge can now be compiled out
MADT revision bumped to 3
Fixes, cleanups all over the place.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

# -----BEGIN PGP SIGNATURE-----
#
# iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmRniWoPHG1zdEByZWRo
# YXQuY29tAAoJECgfDbjSjVRpN4MH/RqdvHmujrjvjzXbbN/gq87Njp+kQLKEooIE
# ZkqdNaVUE6vjCH8iU+chjsxt4VSquSjOL9CWWrYefEIeqCFLWsuXSAY0VDAbY67x
# +aes51tTYILVsx7fbb+T5mJKRgVuWW4C5KaGeQ1djSexy42nvplZUJdIJUhZr0t9
# dzzOsD+mezHS7Xu2QOzSfl5QQRuOVVJnjJXkqJG/yRvHrZM5aTolatr/X7jNGedm
# 4oyMsVMaAcQ+dnEQigRJodf/MpFfs9DfNZAH55VwwQWsNT0t0ueD0xigR203jjaE
# mJJJipAqetFax2JjC7QMXWf+LR36BnL/0/xH+x/BWb0FI42wr0I=
# =ajmR
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 19 May 2023 07:36:26 AM PDT
# gpg:                using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg:                issuer "mst@redhat.com"
# gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [undefined]
# gpg:                 aka "Michael S. Tsirkin <mst@redhat.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17  0970 C350 3912 AFBE 8E67
#      Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA  8A0D 281F 0DB8 D28D 5469

* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (40 
commits)
  hw/i386/pc: No need for rtc_state to be an out-parameter
  hw/i386/pc: Create RTC controllers in south bridges
  hw/cxl: Introduce cxl_device_get_timestamp() utility function
  hw/cxl: rename mailbox return code type from ret_code to CXLRetCode
  hw/pci-bridge: make building pcie-to-pci bridge configurable
  virtio-pci: add handling of PCI ATS and Device-TLB enable/disable
  hw/pci-host/pam: Make init_pam() usage more readable
  hw/i386/pc: Initialize ram_memory variable directly
  hw/i386/pc_{q35,piix}: Minimize usage of get_system_memory()
  hw/i386/pc_{q35,piix}: Reuse MachineClass::desc as SMB product name
  hw/i386/pc_q35: Reuse machine parameter
  hw/pci-host/q35: Inline sysbus_add_io()
  hw/pci-host/i440fx: Inline sysbus_add_io()
  vhost-vdpa: Add support for vIOMMU.
  vhost-vdpa: Add check for full 64-bit in region delete
  vhost_vdpa: fix the input in trace_vhost_vdpa_listener_region_del()
  vhost: expose function vhost_dev_has_iommu()
  virtio-crypto: fix NULL pointer dereference in virtio_crypto_free_request
  virtio-net: not enable vq reset feature unconditionally
  vhost-user: Remove acpi-specific memslot limit
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Compare: https://github.com/qemu/qemu/compare/a60493f59484...64e63dca0883



reply via email to

[Prev in Thread] Current Thread [Next in Thread]