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[Qemu-commits] [qemu/qemu] 4d0386: hw/arm/smmu: Handle big-endian hosts
From: |
Peter Maydell |
Subject: |
[Qemu-commits] [qemu/qemu] 4d0386: hw/arm/smmu: Handle big-endian hosts correctly |
Date: |
Tue, 25 Jul 2023 22:19:43 -0700 |
Branch: refs/heads/staging-8.0
Home: https://github.com/qemu/qemu
Commit: 4d0386e14a527fbaafa068be74b8aeb743724c12
https://github.com/qemu/qemu/commit/4d0386e14a527fbaafa068be74b8aeb743724c12
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M hw/arm/smmu-common.c
M hw/arm/smmuv3.c
Log Message:
-----------
hw/arm/smmu: Handle big-endian hosts correctly
The implementation of the SMMUv3 has multiple places where it reads a
data structure from the guest and directly operates on it without
doing a guest-to-host endianness conversion. Since all SMMU data
structures are little-endian, this means that the SMMU doesn't work
on a big-endian host. In particular, this causes the Avocado test
machine_aarch64_virt.py:Aarch64VirtMachine.test_alpine_virt_tcg_gic_max
to fail on an s390x host.
Add appropriate byte-swapping on reads and writes of guest in-memory
data structures so that the device works correctly on big-endian
hosts.
As part of this we constrain queue_read() to operate only on Cmd
structs and queue_write() on Evt structs, because in practice these
are the only data structures the two functions are used with, and we
need to know what the data structure is to be able to byte-swap its
parts correctly.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20230717132641.764660-1-peter.maydell@linaro.org
Cc: qemu-stable@nongnu.org
(cherry picked from commit c6445544d4cea2628fbad3bad09f3d3a03c749d3)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Commit: cdcbc53272795ebc3a0a060c693e222dfc6f4b1f
https://github.com/qemu/qemu/commit/cdcbc53272795ebc3a0a060c693e222dfc6f4b1f
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2023-07-25 (Tue, 25 Jul 2023)
Changed paths:
M target/arm/debug_helper.c
Log Message:
-----------
target/arm: Special case M-profile in debug_helper.c code
A lot of the code called from helper_exception_bkpt_insn() is written
assuming A-profile, but we will also call this helper on M-profile
CPUs when they execute a BKPT insn. This used to work by accident,
but recent changes mean that we will hit an assert when some of this
code calls down into lower level functions that end up calling
arm_security_space_below_el3(), arm_el_is_aa64(), and other functions
that now explicitly assert that the guest CPU is not M-profile.
Handle M-profile directly to avoid the assertions:
* in arm_debug_target_el(), M-profile debug exceptions always
go to EL1
* in arm_debug_exception_fsr(), M-profile always uses the short
format FSR (compare commit d7fe699be54b2, though in this case
the code in arm_v7m_cpu_do_interrupt() does not need to
look at the FSR value at all)
Cc: qemu-stable@nongnu.org
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1775
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230721143239.1753066-1-peter.maydell@linaro.org
(cherry picked from commit 5d78893f39caf94c8587141e2219b57a7d63dd5c)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Compare: https://github.com/qemu/qemu/compare/ce721d21f1cb...cdcbc5327279
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