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[Qemu-commits] [qemu/qemu] 40a081: hw/intc/loongson_ipi: Rename Loongson
From: |
Richard Henderson |
Subject: |
[Qemu-commits] [qemu/qemu] 40a081: hw/intc/loongson_ipi: Rename LoongsonIPI -> Loongs... |
Date: |
Tue, 06 Aug 2024 14:08:27 -0700 |
Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 40a0815e311fb160e6208fb17aef91d3f82f32e7
https://github.com/qemu/qemu/commit/40a0815e311fb160e6208fb17aef91d3f82f32e7
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/intc/loongson_ipi.c
M include/hw/intc/loongson_ipi.h
Log Message:
-----------
hw/intc/loongson_ipi: Rename LoongsonIPI -> LoongsonIPIState
We'll have to add LoongsonIPIClass in few commits,
so rename LoongsonIPI as LoongsonIPIState for clarity.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-2-philmd@linaro.org>
Commit: 530e6daf74bf506ee8133a490722b5f24aa54744
https://github.com/qemu/qemu/commit/530e6daf74bf506ee8133a490722b5f24aa54744
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/intc/loongson_ipi.c
Log Message:
-----------
hw/intc/loongson_ipi: Extract loongson_ipi_common_realize()
In preparation to extract common IPI code in few commits,
extract loongson_ipi_common_realize().
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-3-philmd@linaro.org>
Commit: 7e555781e4b681becf79ad4f89cfb66a43f8a9d0
https://github.com/qemu/qemu/commit/7e555781e4b681becf79ad4f89cfb66a43f8a9d0
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M MAINTAINERS
M hw/intc/Kconfig
M hw/intc/loongson_ipi.c
A hw/intc/loongson_ipi_common.c
M hw/intc/meson.build
M include/hw/intc/loongson_ipi.h
A include/hw/intc/loongson_ipi_common.h
Log Message:
-----------
hw/intc/loongson_ipi: Add TYPE_LOONGSON_IPI_COMMON stub
Introduce LOONGSON_IPI_COMMON stubs, QDev parent of LOONGSON_IPI.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-4-philmd@linaro.org>
Commit: 2252e6c94e34c2373e8d16573284a00541e3c62c
https://github.com/qemu/qemu/commit/2252e6c94e34c2373e8d16573284a00541e3c62c
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M include/hw/intc/loongson_ipi.h
M include/hw/intc/loongson_ipi_common.h
Log Message:
-----------
hw/intc/loongson_ipi: Move common definitions to loongson_ipi_common.h
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-5-philmd@linaro.org>
Commit: a022e0de53579da9df20945de70a82957258a972
https://github.com/qemu/qemu/commit/a022e0de53579da9df20945de70a82957258a972
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/intc/loongson_ipi.c
M include/hw/intc/loongson_ipi.h
Log Message:
-----------
hw/intc/loongson_ipi: Move IPICore::mmio_mem to LoongsonIPIState
It is easier to manage one array of MMIO MR rather
than one per vCPU.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-6-philmd@linaro.org>
Commit: 6c8698a5e4d65754addb6afa23c1c2f242593692
https://github.com/qemu/qemu/commit/6c8698a5e4d65754addb6afa23c1c2f242593692
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/intc/loongson_ipi.c
M hw/intc/loongson_ipi_common.c
M include/hw/intc/loongson_ipi.h
M include/hw/intc/loongson_ipi_common.h
Log Message:
-----------
hw/intc/loongson_ipi: Move IPICore structure to loongson_ipi_common.h
Move the IPICore structure and corresponding common fields
of LoongsonIPICommonState to "hw/intc/loongson_ipi_common.h".
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-7-philmd@linaro.org>
Commit: ed722e0ec4eb275a7710e7af518a0063e75b054f
https://github.com/qemu/qemu/commit/ed722e0ec4eb275a7710e7af518a0063e75b054f
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/intc/loongson_ipi.c
Log Message:
-----------
hw/intc/loongson_ipi: Pass LoongsonIPICommonState to send_ipi_data()
In order to get LoongsonIPICommonClass in send_ipi_data()
in the next commit, propagate LoongsonIPICommonState.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-8-philmd@linaro.org>
Commit: a81cd679d70b8c954c17d23a7bd28e7c90fb366e
https://github.com/qemu/qemu/commit/a81cd679d70b8c954c17d23a7bd28e7c90fb366e
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/intc/loongson_ipi.c
M include/hw/intc/loongson_ipi_common.h
Log Message:
-----------
hw/intc/loongson_ipi: Add LoongsonIPICommonClass::get_iocsr_as handler
Allow Loongson IPI implementations to have their own get_iocsr_as()
handler.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-9-philmd@linaro.org>
Commit: 8f4f38fd2a6cee5c3a9aaa5d8c78b3b7e456e5e8
https://github.com/qemu/qemu/commit/8f4f38fd2a6cee5c3a9aaa5d8c78b3b7e456e5e8
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/intc/loongson_ipi.c
M include/hw/intc/loongson_ipi_common.h
Log Message:
-----------
hw/intc/loongson_ipi: Add LoongsonIPICommonClass::cpu_by_arch_id handler
Allow Loongson IPI implementations to have their own
cpu_by_arch_id() handler.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-10-philmd@linaro.org>
Commit: 2aca564e678ff258480aef644296de2cafb8890f
https://github.com/qemu/qemu/commit/2aca564e678ff258480aef644296de2cafb8890f
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/intc/loongson_ipi.c
M include/hw/intc/loongson_ipi_common.h
Log Message:
-----------
hw/intc/loongson_ipi: Expose loongson_ipi_core_read/write helpers
In order to access loongson_ipi_core_read/write helpers
from loongson_ipi_common.c in the next commit, make their
prototype declaration public.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-11-philmd@linaro.org>
Commit: ec8595578fa2b526dba999c1fe0b87129f5b2c9a
https://github.com/qemu/qemu/commit/ec8595578fa2b526dba999c1fe0b87129f5b2c9a
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/intc/loongson_ipi.c
M hw/intc/loongson_ipi_common.c
M include/hw/intc/loongson_ipi_common.h
Log Message:
-----------
hw/intc/loongson_ipi: Move common code to loongson_ipi_common.c
Move the common code from loongson_ipi.c to loongson_ipi_common.c,
call parent_realize() instead of loongson_ipi_common_realize() in
loongson_ipi_realize().
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-12-philmd@linaro.org>
Commit: c403d5ff935d93ac89ff3e216428609979306cbb
https://github.com/qemu/qemu/commit/c403d5ff935d93ac89ff3e216428609979306cbb
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/intc/Kconfig
A hw/intc/loongarch_ipi.c
M hw/intc/meson.build
A include/hw/intc/loongarch_ipi.h
Log Message:
-----------
hw/intc/loongarch_ipi: Add loongarch IPI support
Loongarch IPI is added here, it inherits from class
TYPE_LOONGSON_IPI_COMMON, and two interfaces get_iocsr_as() and
cpu_by_arch_id() are added for Loongarch 3A5000 machine. It can
be used when ipi is emulated in userspace with KVM mode.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Rebased and simplified]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-13-philmd@linaro.org>
Commit: ef2f11454cc6644d2fb68f67e707bc637036d006
https://github.com/qemu/qemu/commit/ef2f11454cc6644d2fb68f67e707bc637036d006
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/loongarch/Kconfig
M hw/loongarch/virt.c
M include/hw/loongarch/virt.h
Log Message:
-----------
hw/loongarch/virt: Replace Loongson IPI with LoongArch IPI
Loongarch IPI inherits from class LoongsonIPICommonClass, and it
only contains Loongarch 3A5000 virt machine specific interfaces,
rather than mix different machine implementations together.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Rebased]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-14-philmd@linaro.org>
Commit: 3fad6db79e892c1e19a8b6b354284f183ed0432c
https://github.com/qemu/qemu/commit/3fad6db79e892c1e19a8b6b354284f183ed0432c
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M MAINTAINERS
M hw/intc/loongson_ipi.c
Log Message:
-----------
hw/intc/loongson_ipi: Restrict to MIPS
Now than LoongArch target can use the TYPE_LOONGARCH_IPI
model, restrict TYPE_LOONGSON_IPI to MIPS.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
[PMD: Extracted from bigger commit, added commit description]
Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
Tested-by: Bibo Mao <maobibo@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Message-Id: <20240805180622.21001-15-philmd@linaro.org>
Commit: 22d5fb42a82378c208355ff4a27cf25fc1cd652e
https://github.com/qemu/qemu/commit/22d5fb42a82378c208355ff4a27cf25fc1cd652e
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/sd/sd.c
Log Message:
-----------
hw/sd/sdcard: Explicit dummy byte value
On error the DAT lines are left unmodified to their
previous states. QEMU returns 0x00 for convenience.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240730092138.32443-2-philmd@linaro.org>
Commit: bd6207903eb81c0e876452bba25ed7d57ddf5f89
https://github.com/qemu/qemu/commit/bd6207903eb81c0e876452bba25ed7d57ddf5f89
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/sd/sd.c
Log Message:
-----------
hw/sd/sdcard: Do not abort when reading DAT lines on invalid cmd state
Guest should not try to read the DAT lines from invalid
command state. If it still insists to do so, return a
dummy value.
Cc: qemu-stable@nongnu.org
Fixes: e2dec2eab0 ("hw/sd/sdcard: Remove default case in read/write on DAT
lines")
Reported-by: Zheyu Ma <zheyuma97@gmail.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2454
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240730092138.32443-3-philmd@linaro.org>
Commit: ed5a159c3de48a581f46de4c8c02b4b295e6c52d
https://github.com/qemu/qemu/commit/ed5a159c3de48a581f46de4c8c02b4b295e6c52d
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/sd/sdhci.c
Log Message:
-----------
hw/sd/sdhci: Reset @data_count index on invalid ADMA transfers
We neglected to clear the @data_count index on ADMA error,
allowing to trigger assertion in sdhci_read_dataport() or
sdhci_write_dataport().
Cc: qemu-stable@nongnu.org
Fixes: d7dfca0807 ("hw/sdhci: introduce standard SD host controller")
Reported-by: Zheyu Ma <zheyuma97@gmail.com>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2455
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240730092138.32443-4-philmd@linaro.org>
Commit: 8f64e7449e474e18017eb1414bc13e491edd8596
https://github.com/qemu/qemu/commit/8f64e7449e474e18017eb1414bc13e491edd8596
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/block/pflash_cfi01.c
Log Message:
-----------
hw/block/pflash_cfi01: Don't decrement pfl->counter below 0
In pflash_write() Coverity points out that we can decrement the
unsigned pfl->counter below zero, which makes it wrap around. In
fact this is harmless, because if pfl->counter is 0 at this point we
also increment pfl->wcycle to 3, and the wcycle == 3 handling doesn't
look at counter; the only way back into code which looks at the
counter value is via wcycle == 1, which will reinitialize the counter.
But it's arguably a little clearer to break early in the "counter ==
0" if(), to avoid the decrement-below-zero.
Resolves: Coverity CID 1547611
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Message-ID: <20240731143617.3391947-4-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: f63085c85d164484a58fa320114f389c91194487
https://github.com/qemu/qemu/commit/f63085c85d164484a58fa320114f389c91194487
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/ide/atapi.c
Log Message:
-----------
hw/ide/atapi: Be explicit that assigning to s->lcyl truncates
In ide_atapi_cmd_reply_end() we calculate a 16-bit size, and then
assign its two halves to s->lcyl and s->hcyl like this:
s->lcyl = size;
s->hcyl = size >> 8;
Coverity warns that the first line here can overflow the
8-bit s->lcyl variable. This is true, and in this case we're
deliberately only after the low 8 bits of the value. The
code is clearer to both humans and Coverity if we're explicit
that we only wanted the low 8 bits, though.
Resolves: Coverity CID 1547621
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Message-ID: <20240731143617.3391947-5-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 11b46661613f847cd0c4070baa2d33c9ff2f3fcd
https://github.com/qemu/qemu/commit/11b46661613f847cd0c4070baa2d33c9ff2f3fcd
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/block/fdc-isa.c
Log Message:
-----------
hw/block/fdc-isa: Assert that isa_fdc_get_drive_max_chs() found something
Coverity complains about an overflow in isa_fdc_get_drive_max_chs()
that can happen if the loop over fd_formats never finds a match,
because we initialize *maxc to 0 and then at the end of the
function decrement it.
This can't ever actually happen because fd_formats has at least
one entry for each FloppyDriveType, so we must at least once
find a match and update *maxc, *maxh and *maxs. Assert that we
did find a match, which should keep Coverity happy and will also
detect possible bugs in the data in fd_formats.
Resolves: Coverity CID 1547663
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240731143617.3391947-6-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: c1a6ae5145f2e72c1eaf53b7a8c96cdbb64211bd
https://github.com/qemu/qemu/commit/c1a6ae5145f2e72c1eaf53b7a8c96cdbb64211bd
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/ide/pci.c
Log Message:
-----------
hw/ide/pci: Remove dead code from bmdma_prepare_buf()
Coverity notes that the code at the end of the loop in
bmdma_prepare_buf() is unreachable. This is because in commit
9fbf0fa81fca8f527 ("ide: remove hardcoded 2GiB transactional limit")
we removed the only codepath in the loop which could "break" out of
it, but didn't notice that this meant we should also remove the code
at the end of the loop.
Remove the dead code.
Resolves: Coverity CID 1547772
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
[PMD: Break and return once at EOF]
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240805182419.22239-1-philmd@linaro.org>
Commit: 0fa57cbfa7039e4a579f1a4a0956982b654335c8
https://github.com/qemu/qemu/commit/0fa57cbfa7039e4a579f1a4a0956982b654335c8
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/display/virtio-gpu-gl.c
Log Message:
-----------
hw/display/virtio-gpu: Improve "opengl is not available" error message
If the user tries to use the virtio-gpu-gl device but the display
backend doesn't have OpenGL support enabled, we currently print a
rather uninformative error message:
$ qemu-system-aarch64 -M virt -device virtio-gpu-gl
qemu-system-aarch64: -device virtio-gpu-gl: opengl is not available
Since OpenGL is not enabled on display frontends by default, users
are quite likely to run into this. Improve the error message to
be more specific and to suggest to the user a path forward.
Note that the case of "user tried to enable OpenGL but the display
backend doesn't handle it" is caught elsewhere first, so we can
assume that isn't the problem:
$ qemu-system-aarch64 -M virt -device virtio-gpu-gl -display curses,gl=on
qemu-system-aarch64: OpenGL is not supported by the display
(Use of error_append_hint() requires us to add an ERRP_GUARD() to
the function, as noted in include/qapi/error.h.)
With this commit we now produce the hopefully more helpful error:
$ ./build/x86/qemu-system-aarch64 -M virt -device virtio-gpu-gl
qemu-system-aarch64: -device virtio-gpu-gl: The display backend does not have
OpenGL support enabled
It can be enabled with '-display BACKEND,gl=on' where BACKEND is the name of
the display backend to use.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2443
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-ID: <20240731154136.3494621-2-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 7aea035a60eec599c487d71659fdb5102b69cfb9
https://github.com/qemu/qemu/commit/7aea035a60eec599c487d71659fdb5102b69cfb9
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M system/vl.c
Log Message:
-----------
system/vl.c: Expand OpenGL related errors
Expand the OpenGL related error messages we produce for various
"OpenGL not present/not supported" cases, to hopefully guide the
user towards how to fix things.
Now if the user tries to enable GL on a backend that doesn't
support it the error message is a bit more precise:
$ qemu-system-aarch64 -M virt -device virtio-gpu-gl -display curses,gl=on
qemu-system-aarch64: OpenGL is not supported by display backend 'curses'
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
[AJB: Improved error report message]
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-ID: <20240731154136.3494621-3-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: ef0a1212c9c9c4b50fb6f7d83fbb6cbb3c8e5355
https://github.com/qemu/qemu/commit/ef0a1212c9c9c4b50fb6f7d83fbb6cbb3c8e5355
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M ui/console.c
Log Message:
-----------
ui/console: Note in '-display help' that some backends support suboptions
Currently '-display help' only prints the available backends. Some
of those backends support suboptions (e.g. '-display gtk,gl=on').
Mention that in the help output, and point the user to where they
might be able to find more information about the suboptions.
The new output looks like this:
$ qemu-system-aarch64 -display help
Available display backend types:
none
gtk
sdl
egl-headless
curses
spice-app
dbus
Some display backends support suboptions, which can be set with
-display backend,option=value,option=value...
For a short list of the suboptions for each display, see the top-level -help
output; more detail is in the documentation.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-ID: <20240731154136.3494621-4-peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 50a24291948a25a919147cea45eaa92bd8e401b8
https://github.com/qemu/qemu/commit/50a24291948a25a919147cea45eaa92bd8e401b8
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/pci-host/gt64120.c
Log Message:
-----------
hw/pci-host/gt64120: Set PCI base address register write mask
When booting Linux we see:
PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [mem 0x10000000-0x17ffffff]
pci_bus 0000:00: root bus resource [io 0x1000-0x1fffff]
pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
pci 0000:00:00.0: [11ab:4620] type 00 class 0x060000
pci 0000:00:00.0: [Firmware Bug]: reg 0x14: invalid BAR (can't size)
pci 0000:00:00.0: [Firmware Bug]: reg 0x18: invalid BAR (can't size)
pci 0000:00:00.0: [Firmware Bug]: reg 0x1c: invalid BAR (can't size)
pci 0000:00:00.0: [Firmware Bug]: reg 0x20: invalid BAR (can't size)
pci 0000:00:00.0: [Firmware Bug]: reg 0x24: invalid BAR (can't size)
This is due to missing base address register write mask.
Add it to get:
PCI host bridge to bus 0000:00
pci_bus 0000:00: root bus resource [mem 0x10000000-0x17ffffff]
pci_bus 0000:00: root bus resource [io 0x1000-0x1fffff]
pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff]
pci 0000:00:00.0: [11ab:4620] type 00 class 0x060000
pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x00000fff pref]
pci 0000:00:00.0: reg 0x14: [mem 0x01000000-0x01000fff pref]
pci 0000:00:00.0: reg 0x18: [mem 0x1c000000-0x1c000fff]
pci 0000:00:00.0: reg 0x1c: [mem 0x1f000000-0x1f000fff]
pci 0000:00:00.0: reg 0x20: [mem 0x1be00000-0x1be00fff]
pci 0000:00:00.0: reg 0x24: [io 0x14000000-0x14000fff]
Since this device is only used by MIPS machines which aren't
versioned, we don't need to update migration compat machinery.
Mention the datasheet referenced. Remove the "Malta assumptions
ahead" comment since the reset values from the datasheet are used.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <20240802213122.86852-2-philmd@linaro.org>
Commit: ec70b7737f18de92e4c9aa31742ecfb680ed6005
https://github.com/qemu/qemu/commit/ec70b7737f18de92e4c9aa31742ecfb680ed6005
Author: Philippe Mathieu-Daudé <philmd@linaro.org>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M hw/pci-host/gt64120.c
Log Message:
-----------
hw/pci-host/gt64120: Reset config registers during RESET phase
Reset config values in the device RESET phase, not only once
when the device is realized, because otherwise the device can
use unknown values at reset.
Since we are adding a new reset method, use the preferred
Resettable API (for a simple leaf device reset, a
DeviceClass::reset method and a ResettableClass::reset_hold
method are essentially identical).
Reported-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240802213122.86852-3-philmd@linaro.org>
Commit: 6e717a723073fc05a8438d8ffb289e030207ee62
https://github.com/qemu/qemu/commit/6e717a723073fc05a8438d8ffb289e030207ee62
Author: George Matsumura <gorg@gorgnet.net>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M docs/specs/pci-ids.rst
Log Message:
-----------
docs/specs/pci-ids: Add missing devices
Add the missing devices 1b36:000c (PCIe root port) and 1b36:000e
(PCIe-to-PCI bridge).
Signed-off-by: George Matsumura <gorg@gorgnet.net>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240805031012.16547-2-gorg@gorgnet.net>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: 7e7085da1f86655cb9c892e14328cc07fe552717
https://github.com/qemu/qemu/commit/7e7085da1f86655cb9c892e14328cc07fe552717
Author: George Matsumura <gorg@gorgnet.net>
Date: 2024-08-06 (Tue, 06 Aug 2024)
Changed paths:
M docs/specs/pci-ids.rst
Log Message:
-----------
docs/specs/pci-ids: Fix markup
This fixes the markup of the PCI and PCIe Expander Bridge entries to be
consistent with the rest of the file.
Signed-off-by: George Matsumura <gorg@gorgnet.net>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240805031012.16547-4-gorg@gorgnet.net>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Commit: f4bb895a3bb08d9bf6b04937555eff14225772e4
https://github.com/qemu/qemu/commit/f4bb895a3bb08d9bf6b04937555eff14225772e4
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-08-07 (Wed, 07 Aug 2024)
Changed paths:
M MAINTAINERS
M docs/specs/pci-ids.rst
M hw/block/fdc-isa.c
M hw/block/pflash_cfi01.c
M hw/display/virtio-gpu-gl.c
M hw/ide/atapi.c
M hw/ide/pci.c
M hw/intc/Kconfig
A hw/intc/loongarch_ipi.c
M hw/intc/loongson_ipi.c
A hw/intc/loongson_ipi_common.c
M hw/intc/meson.build
M hw/loongarch/Kconfig
M hw/loongarch/virt.c
M hw/pci-host/gt64120.c
M hw/sd/sd.c
M hw/sd/sdhci.c
A include/hw/intc/loongarch_ipi.h
M include/hw/intc/loongson_ipi.h
A include/hw/intc/loongson_ipi_common.h
M include/hw/loongarch/virt.h
M system/vl.c
M ui/console.c
Log Message:
-----------
Merge tag 'hw-misc-20240806' of https://github.com/philmd/qemu into staging
Misc HW & UI patches
- Replace Loongson IPI with LoongArch IPI on LoongArch Virt machine (Bibo)
- SD card: Do not abort when reading DAT lines on invalid cmd state (Phil)
- SDHCI: Reset @data_count index on invalid ADMA transfers (Phil)
- Don't decrement PFlash counter below 0 (Peter)
- Explicit a 8bit truncate on IDE ATAPI (Peter)
- Silent Coverity warning in ISA FDC (Peter)
- Remove dead code in PCI IDE bmdma_prepare_buf (Peter)
- Improve OpenGL and related display error messages (Peter)
- Set PCI base address register write mask on GC64120 host bridge (Phil)
- List PCIe Root Port and PCIe-to-PCI bridge in QEMU PCI IDs list (George)
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[full]
* tag 'hw-misc-20240806' of https://github.com/philmd/qemu: (28 commits)
docs/specs/pci-ids: Fix markup
docs/specs/pci-ids: Add missing devices
hw/pci-host/gt64120: Reset config registers during RESET phase
hw/pci-host/gt64120: Set PCI base address register write mask
ui/console: Note in '-display help' that some backends support suboptions
system/vl.c: Expand OpenGL related errors
hw/display/virtio-gpu: Improve "opengl is not available" error message
hw/ide/pci: Remove dead code from bmdma_prepare_buf()
hw/block/fdc-isa: Assert that isa_fdc_get_drive_max_chs() found something
hw/ide/atapi: Be explicit that assigning to s->lcyl truncates
hw/block/pflash_cfi01: Don't decrement pfl->counter below 0
hw/sd/sdhci: Reset @data_count index on invalid ADMA transfers
hw/sd/sdcard: Do not abort when reading DAT lines on invalid cmd state
hw/sd/sdcard: Explicit dummy byte value
hw/intc/loongson_ipi: Restrict to MIPS
hw/loongarch/virt: Replace Loongson IPI with LoongArch IPI
hw/intc/loongarch_ipi: Add loongarch IPI support
hw/intc/loongson_ipi: Move common code to loongson_ipi_common.c
hw/intc/loongson_ipi: Expose loongson_ipi_core_read/write helpers
hw/intc/loongson_ipi: Add LoongsonIPICommonClass::cpu_by_arch_id handler
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Compare: https://github.com/qemu/qemu/compare/c659b7b3b492...f4bb895a3bb0
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