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[Qemu-commits] [qemu/qemu] e412e9: target/sparc: Add FQ and FSR.QNE
From: |
Peter Maydell |
Subject: |
[Qemu-commits] [qemu/qemu] e412e9: target/sparc: Add FQ and FSR.QNE |
Date: |
Fri, 13 Sep 2024 03:38:56 -0700 |
Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: e412e9973a49e9e79bc733438fe2b637c11b6e14
https://github.com/qemu/qemu/commit/e412e9973a49e9e79bc733438fe2b637c11b6e14
Author: Carl Hauser <chauser@pullman.com>
Date: 2024-09-11 (Wed, 11 Sep 2024)
Changed paths:
M target/sparc/cpu.h
M target/sparc/fop_helper.c
M target/sparc/machine.c
Log Message:
-----------
target/sparc: Add FQ and FSR.QNE
Add support for, and migrate, a single-entry fp
instruction queue for sparc32.
Signed-off-by: Carl Hauser <chauser@pullman.com>
[rth: Split from a larger patch;
adjust representation with union;
add migration state]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Carl Hauser <chauser@pullman.com>
Commit: c35c8d4d1a1e7b556158b23fb90719f44ac98966
https://github.com/qemu/qemu/commit/c35c8d4d1a1e7b556158b23fb90719f44ac98966
Author: Carl Hauser <chauser@pullman.com>
Date: 2024-09-11 (Wed, 11 Sep 2024)
Changed paths:
M target/sparc/int32_helper.c
Log Message:
-----------
target/sparc: Populate sparc32 FQ when raising fp exception
Implement a single instruction floating point queue,
populated while delivering an fp exception.
Signed-off-by: Carl Hauser <chauser@pullman.com>
[rth: Split from a larger patch]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Carl Hauser <chauser@pullman.com>
Commit: 5a165e2615736a60acce94fbd4e66eda5ba92268
https://github.com/qemu/qemu/commit/5a165e2615736a60acce94fbd4e66eda5ba92268
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-09-11 (Wed, 11 Sep 2024)
Changed paths:
M target/sparc/cpu.h
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Add FSR_QNE to tb_flags
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Carl Hauser <chauser@pullman.com>
Commit: 29b99802aaf519c3c5b9ac8f713458908cf70799
https://github.com/qemu/qemu/commit/29b99802aaf519c3c5b9ac8f713458908cf70799
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-09-11 (Wed, 11 Sep 2024)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Implement STDFQ
Invalid encoding of addr should raise TT_ILL_INSN, so
check before supervisor, which might raise TT_PRIV_INSN.
Clear QNE after execution.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2340
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Carl Hauser <chauser@pullman.com>
Commit: d2a0c3a7f7740a3d563c8c3ef1fffcc87a36213d
https://github.com/qemu/qemu/commit/d2a0c3a7f7740a3d563c8c3ef1fffcc87a36213d
Author: Richard Henderson <richard.henderson@linaro.org>
Date: 2024-09-11 (Wed, 11 Sep 2024)
Changed paths:
M target/sparc/translate.c
Log Message:
-----------
target/sparc: Add gen_trap_if_nofpu_fpexception
Model fp_exception state, in which only fp stores are allowed
until such time as the FQ has been flushed.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Carl Hauser <chauser@pullman.com>
Commit: a840d70ee474c514b939f6f16fd51396c73d01c7
https://github.com/qemu/qemu/commit/a840d70ee474c514b939f6f16fd51396c73d01c7
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-09-12 (Thu, 12 Sep 2024)
Changed paths:
M target/loongarch/cpu.c
Log Message:
-----------
target/loongarch: Add compatible support about VM reboot
With edk2-stable202408 LoongArch UEFI bios, CSR PGD register is set only
if its value is equal to zero for boot cpu, it causes reboot issue. Since
CSR PGD register is changed with linux kernel, UEFI BIOS cannot use it.
Add workaround to clear CSR registers relative with TLB in function
loongarch_cpu_reset_hold(), so that VM can reboot with edk2-stable202408
UEFI bios.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240827035807.3326293-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Commit: d69490c499b628cdcacf7bf689cff0880147027f
https://github.com/qemu/qemu/commit/d69490c499b628cdcacf7bf689cff0880147027f
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-09-12 (Thu, 12 Sep 2024)
Changed paths:
M hw/loongarch/Kconfig
Log Message:
-----------
hw/loongarch: Remove default enable with VIRTIO_VGA device
For virtio VGA deivce libvirt will select VIRTIO_VGA firstly rather than
VIRTIO_GPU, VIRTIO_VGA device supports frame buffer however it requires
legacy VGA compatible support. Frame buffer area 0xa0000 -- 0xc0000
conflicts with low memory area 0 -- 0x10000000.
Here remove default support for VIRTIO_VGA device, VIRTIO_GPU is prefered
on LoongArch system. For frame buffer video card support, standard VGA can
be used.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240823073050.2619484-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Commit: a724f5a84ef027cd481a18eda67ea2de58282c3e
https://github.com/qemu/qemu/commit/a724f5a84ef027cd481a18eda67ea2de58282c3e
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-09-12 (Thu, 12 Sep 2024)
Changed paths:
M target/loongarch/cpu.c
M target/loongarch/kvm/kvm.c
M target/loongarch/kvm/kvm_loongarch.h
Log Message:
-----------
target/loongarch/kvm: Add vCPU reset function
KVM provides interface KVM_REG_LOONGARCH_VCPU_RESET to reset vCPU,
it can be used to clear internal state about kvm kernel. vCPU reset
function is added here for kvm mode.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240822022827.2273534-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Commit: 32c22cc47cf9b99d53aa698c612a215609fdb6c7
https://github.com/qemu/qemu/commit/32c22cc47cf9b99d53aa698c612a215609fdb6c7
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-09-12 (Thu, 12 Sep 2024)
Changed paths:
A target/loongarch/arch_dump.c
M target/loongarch/cpu.c
M target/loongarch/internals.h
M target/loongarch/meson.build
Log Message:
-----------
target/loongarch: Support QMP dump-guest-memory
Add the support needed for creating prstatus elf notes. This allows
us to use QMP dump-guest-memory.
Now ELF notes of LoongArch only supports general elf notes, LSX and
LASX is not supported, since it is mainly used to dump guest memory.
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Tested-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240822065245.2286214-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Commit: b3d4ef83485f31e5fc20bbc7a17c6712b0f903dd
https://github.com/qemu/qemu/commit/b3d4ef83485f31e5fc20bbc7a17c6712b0f903dd
Author: Jason A. Donenfeld <Jason@zx2c4.com>
Date: 2024-09-12 (Thu, 12 Sep 2024)
Changed paths:
M hw/loongarch/acpi-build.c
M hw/loongarch/virt.c
M include/hw/pci-host/ls7a.h
Log Message:
-----------
hw/loongarch: virt: support up to 4 serial ports
In order to support additional channels of communication using
`-serial`, add several serial ports, up to the standard 4 generally
supported by the 8250 driver.
Fixed: https://lore.kernel.org/all/20240907143439.2792924-1-Jason@zx2c4.com/
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Tested-by: Bibo Mao <maobibo@loongson.cn>
[gaosong: ACPI uart need't reverse order]
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240907143439.2792924-1-Jason@zx2c4.com>
Commit: d9bd1ccbf1d84d872aed684c65fec33814b8ac1b
https://github.com/qemu/qemu/commit/d9bd1ccbf1d84d872aed684c65fec33814b8ac1b
Author: Jason A. Donenfeld <Jason@zx2c4.com>
Date: 2024-09-12 (Thu, 12 Sep 2024)
Changed paths:
M hw/loongarch/virt.c
Log Message:
-----------
hw/loongarch: virt: pass random seed to fdt
If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
initialize early. Set this using the usual guest random number
generation function.
This is the same procedure that's done in b91b6b5a2c ("hw/microblaze:
pass random seed to fdt"), e4b4f0b71c ("hw/riscv: virt: pass random seed
to fdt"), c6fe3e6b4c ("hw/openrisc: virt: pass random seed to fdt"),
67f7e426e5 ("hw/i386: pass RNG seed via setup_data entry"), c287941a4d
("hw/rx: pass random seed to fdt"), 5e19cc68fb ("hw/mips: boston: pass
random seed to fdt"), 6b23a67916 ("hw/nios2: virt: pass random seed to fdt")
c4b075318e ("hw/ppc: pass random seed to fdt"), and 5242876f37
("hw/arm/virt: dt: add rng-seed property").
These earlier commits later were amended to rerandomize the RNG seed on
snapshot load, but the LoongArch code somehow already does that, despite
not having this patch here, presumably due to some lucky copy and
pasting.
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240905153316.2038769-1-Jason@zx2c4.com>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Commit: 45d1fe46e5a6fe2b22b034e2b2bc0d941acd4b9e
https://github.com/qemu/qemu/commit/45d1fe46e5a6fe2b22b034e2b2bc0d941acd4b9e
Author: Bibo Mao <maobibo@loongson.cn>
Date: 2024-09-12 (Thu, 12 Sep 2024)
Changed paths:
M hw/loongarch/acpi-build.c
Log Message:
-----------
hw/loongarch: Add acpi SPCR table support
Serial port console redirection table can be used for default serial
port selection, like chosen stdout-path selection with FDT method.
With acpi SPCR table added, early debug console can be parsed from
SPCR table with simple kernel parameter earlycon rather than
earlycon=uart,mmio,0x1fe001e0
Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20240907073037.243353-1-maobibo@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Commit: 1374ed49e1453c30023483e20d705c4321f19cff
https://github.com/qemu/qemu/commit/1374ed49e1453c30023483e20d705c4321f19cff
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2024-09-13 (Fri, 13 Sep 2024)
Changed paths:
M .gitlab-ci.d/crossbuilds.yml
Log Message:
-----------
.gitlab-ci.d/crossbuilds.yml: Force 'make check' single-threaded for
cross-i686-tci
The cross-i686-tci CI job is persistently flaky with various tests
hitting timeouts. One theory for why this is happening is that we're
running too many tests in parallel and so sometimes a test gets
starved of CPU and isn't able to complete within the timeout.
(The environment this CI job runs in seems to cause us to default
to a parallelism of 9 in the main CI.)
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20240912151003.2045031-1-peter.maydell@linaro.org
Commit: a837ef2285c296cbff4a60c34a97af3cbf0a879e
https://github.com/qemu/qemu/commit/a837ef2285c296cbff4a60c34a97af3cbf0a879e
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2024-09-13 (Fri, 13 Sep 2024)
Changed paths:
M target/sparc/cpu.h
M target/sparc/fop_helper.c
M target/sparc/insns.decode
M target/sparc/int32_helper.c
M target/sparc/machine.c
M target/sparc/translate.c
Log Message:
-----------
Merge tag 'pull-sparc-20240911' of https://gitlab.com/rth7680/qemu into
staging
target/sparc: Implement single entry FP Queue
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# 2WfqWQ==
# =kxM7
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 12 Sep 2024 06:28:32 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-sparc-20240911' of https://gitlab.com/rth7680/qemu:
target/sparc: Add gen_trap_if_nofpu_fpexception
target/sparc: Implement STDFQ
target/sparc: Add FSR_QNE to tb_flags
target/sparc: Populate sparc32 FQ when raising fp exception
target/sparc: Add FQ and FSR.QNE
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Commit: 63731c346f071a77e1bb1789bef1ac9d592b6d4f
https://github.com/qemu/qemu/commit/63731c346f071a77e1bb1789bef1ac9d592b6d4f
Author: Peter Maydell <peter.maydell@linaro.org>
Date: 2024-09-13 (Fri, 13 Sep 2024)
Changed paths:
M hw/loongarch/Kconfig
M hw/loongarch/acpi-build.c
M hw/loongarch/virt.c
M include/hw/pci-host/ls7a.h
A target/loongarch/arch_dump.c
M target/loongarch/cpu.c
M target/loongarch/internals.h
M target/loongarch/kvm/kvm.c
M target/loongarch/kvm/kvm_loongarch.h
M target/loongarch/meson.build
Log Message:
-----------
Merge tag 'pull-loongarch-20240912' of https://gitlab.com/gaosong/qemu into
staging
pull-loongarch-20240912
# -----BEGIN PGP SIGNATURE-----
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# =Plwu
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 12 Sep 2024 14:01:34 BST
# gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF
# gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-20240912' of https://gitlab.com/gaosong/qemu:
hw/loongarch: Add acpi SPCR table support
hw/loongarch: virt: pass random seed to fdt
hw/loongarch: virt: support up to 4 serial ports
target/loongarch: Support QMP dump-guest-memory
target/loongarch/kvm: Add vCPU reset function
hw/loongarch: Remove default enable with VIRTIO_VGA device
target/loongarch: Add compatible support about VM reboot
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Compare: https://github.com/qemu/qemu/compare/b620c1c6a407...63731c346f07
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- [Qemu-commits] [qemu/qemu] e412e9: target/sparc: Add FQ and FSR.QNE,
Peter Maydell <=