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RE: [Qemu-devel] Questions on ARM port
From: |
Schwarz, Konrad |
Subject: |
RE: [Qemu-devel] Questions on ARM port |
Date: |
Wed, 15 Mar 2006 09:55:48 +0100 |
> -----Original Message-----
> From: Paul Brook [mailto:address@hidden
> Sent: Tuesday, March 14, 2006 3:21 PM
> To: address@hidden
> Cc: Schwarz, Konrad
> Subject: Re: [Qemu-devel] Questions on ARM port
>
> > Basically, r3 is initialized by <start+8> (to 0x80000, in
> my case).
> > The next instruction (at <start+12>) switches the mode to
> FIQ. After
> > single steping over this in QEMU (via GDB si), r3 no longer
> contains
> > what it had before (0x80000), instead, it is set to 0. If
> I manually
> > fix this (via set $r3=0x80000), then at the next mode switch (at
> > <start+28>) r3 is changed incorrectly to zero again.
> >
> > Is this my fault or what is happening?
>
> It's a big in the qemu FIQ bank switching code. Fixed now.
>
> Paul
Oh, great!
How do I get the patch?
Konrad