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From: | Blue Swirl |
Subject: | Re: [Qemu-devel] [BUG] QEMU crash during cpu reset (MIPS regression) |
Date: | Fri, 4 May 2007 23:27:33 +0300 |
On 5/4/07, Stefan Weil <address@hidden> wrote:
Resetting a MIPS cpu currently does not work, because important entries in env (CPUMIPSState) are filled with 0 at the beginning of function cpu_reset. At system start, these values are set in cpu_mips_register. After reset, env->nb_tlb == 0 results in a division by zero crash of QEMU. We can either re-arrange the entries in CPUMIPSState (move those which must not be zero'ed to the end), or cpu_reset must call cpu_mips_register. Which solution is better?
I solved the same issue on Sparc side by not zeroing most of the state. This is in line with the real Sparc hardware.
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