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Re: [Qemu-devel] [PATCH, RFC] Fix softfloat NaN handling
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From: |
Blue Swirl |
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Subject: |
Re: [Qemu-devel] [PATCH, RFC] Fix softfloat NaN handling |
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Date: |
Wed, 9 May 2007 18:17:46 +0300 |
On 5/9/07, Thiemo Seufer <address@hidden> wrote:
Hello All,
The relevant IEEE standards don't define if a set or a clear bit is
used to distinguish between QNaN and SNaN. MIPS, and apparently
PA RISC, made a different choice than the rest of the industry.
On Sparc, the rule is as follows:
SNaN: sign undefined, exponent 255, mantissa 0xxx...and at least one
bit must be nonzero
QNaN: sign undefined, exponent 255, mantissa 1xxx...
Is this the same as MIPS?