[Qemu-devel] target-ppc specification question

[Sorav Bansal]

Dear qemu-devs,

Two questions about what seems to be a deviation in the qemu-implementation from PowerPC specification:

1. In comparison operations (eg. PPC_OP(cmp)), why does qemu not set the SO bit (which will be the fourth bit) of T0? The spec says that the xer_so bit is copied into the fourth bit of the CRF register.

2. In set_Rc0 operations (eg. PPC_OP(set_Rc0)), why is xer_ov used instead of xer_so? The spec says that a copy of xer_so is used.

I am using the powerpc manual as the specification document available here: 
www.xilinx.com/bvdocs/userguides/ppc_ref_guide.pdf.

I am looking at page 101, Table 3-34 for question 1; page 64, Table 3-2 for question 2.

Regards,
Sorav