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Re: [Qemu-devel] [PATCH] Intel cache info
From: |
Dan Kenigsberg |
Subject: |
Re: [Qemu-devel] [PATCH] Intel cache info |
Date: |
Sun, 9 Sep 2007 16:47:19 +0300 |
User-agent: |
Mutt/1.5.14 (2007-02-12) |
On Sat, Sep 08, 2007 at 09:27:35PM +0200, Filip Navara wrote:
> Fix the CPUID function 2 to correctly report cache info for the particular
> processor. I chose the values closest to the ones reported in the AMD
> registers. This is important for operating systems that detect cache line
> width and later call CLFLUSH for each line. In the previous implementation
> the values didn't specify L2 cache line width and so Darwin endlessly looped
> trying to flush them.
It would be nice to see the patch.
I should probably include it in my patch that exposes host cpu features.
Thanks,
Dan.