"Maciej W. Rozycki" <address@hidden> writes:
Linux performs reads to all registers written including this one
deliberately using an RMW cycle to avoid triggering an erratum in some
early Pentium integrated APICs. Obviously it does not matter for most of
the world as the workaround is build-time conditional, but you'll get it
if you build a generic "runs everywhere" kernel.
It would be quite possible to make the cycle conditional on a
cpufeatures.h quirk flag that is only set on P5. Just would need to
out of line a few functions to avoid code bloat.