[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [4660] 32 bit SVM fixes - INVLPG and INVLPGA updates
|
From: |
Fabrice Bellard |
|
Subject: |
[Qemu-devel] [4660] 32 bit SVM fixes - INVLPG and INVLPGA updates |
|
Date: |
Wed, 04 Jun 2008 13:53:06 +0000 |
Revision: 4660
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4660
Author: bellard
Date: 2008-06-04 13:53:05 +0000 (Wed, 04 Jun 2008)
Log Message:
-----------
32 bit SVM fixes - INVLPG and INVLPGA updates
Modified Paths:
--------------
trunk/target-i386/exec.h
trunk/target-i386/helper.h
trunk/target-i386/op_helper.c
trunk/target-i386/translate.c
Modified: trunk/target-i386/exec.h
===================================================================
--- trunk/target-i386/exec.h 2008-06-04 13:35:58 UTC (rev 4659)
+++ trunk/target-i386/exec.h 2008-06-04 13:53:05 UTC (rev 4660)
@@ -61,7 +61,6 @@
void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
void cpu_x86_update_cr3(CPUX86State *env, target_ulong new_cr3);
void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
-void cpu_x86_flush_tlb(CPUX86State *env, target_ulong addr);
int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr,
int is_write, int mmu_idx, int is_softmmu);
void tlb_fill(target_ulong addr, int is_write, int mmu_idx,
Modified: trunk/target-i386/helper.h
===================================================================
--- trunk/target-i386/helper.h 2008-06-04 13:35:58 UTC (rev 4659)
+++ trunk/target-i386/helper.h 2008-06-04 13:53:05 UTC (rev 4660)
@@ -102,14 +102,14 @@
DEF_HELPER(void, helper_vmexit, (uint32_t exit_code, uint64_t exit_info_1))
DEF_HELPER(void, helper_svm_check_io, (uint32_t port, uint32_t param,
uint32_t next_eip_addend))
-DEF_HELPER(void, helper_vmrun, (void))
+DEF_HELPER(void, helper_vmrun, (int aflag))
DEF_HELPER(void, helper_vmmcall, (void))
-DEF_HELPER(void, helper_vmload, (void))
-DEF_HELPER(void, helper_vmsave, (void))
+DEF_HELPER(void, helper_vmload, (int aflag))
+DEF_HELPER(void, helper_vmsave, (int aflag))
DEF_HELPER(void, helper_stgi, (void))
DEF_HELPER(void, helper_clgi, (void))
DEF_HELPER(void, helper_skinit, (void))
-DEF_HELPER(void, helper_invlpga, (void))
+DEF_HELPER(void, helper_invlpga, (int aflag))
/* x86 FPU */
Modified: trunk/target-i386/op_helper.c
===================================================================
--- trunk/target-i386/op_helper.c 2008-06-04 13:35:58 UTC (rev 4659)
+++ trunk/target-i386/op_helper.c 2008-06-04 13:53:05 UTC (rev 4660)
@@ -2994,7 +2994,7 @@
void helper_invlpg(target_ulong addr)
{
helper_svm_check_intercept_param(SVM_EXIT_INVLPG, 0);
- cpu_x86_flush_tlb(env, addr);
+ tlb_flush_page(env, addr);
}
void helper_rdtsc(void)
@@ -4721,16 +4721,16 @@
#if defined(CONFIG_USER_ONLY)
-void helper_vmrun(void)
+void helper_vmrun(int aflag)
{
}
void helper_vmmcall(void)
{
}
-void helper_vmload(void)
+void helper_vmload(int aflag)
{
}
-void helper_vmsave(void)
+void helper_vmsave(int aflag)
{
}
void helper_stgi(void)
@@ -4742,7 +4742,7 @@
void helper_skinit(void)
{
}
-void helper_invlpga(void)
+void helper_invlpga(int aflag)
{
}
void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
@@ -4791,7 +4791,7 @@
sc->base, sc->limit, sc->flags);
}
-void helper_vmrun(void)
+void helper_vmrun(int aflag)
{
target_ulong addr;
uint32_t event_inj;
@@ -4799,7 +4799,11 @@
helper_svm_check_intercept_param(SVM_EXIT_VMRUN, 0);
- addr = EAX;
+ if (aflag == 2)
+ addr = EAX;
+ else
+ addr = (uint32_t)EAX;
+
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile,"vmrun! " TARGET_FMT_lx "\n", addr);
@@ -4970,13 +4974,16 @@
raise_exception(EXCP06_ILLOP);
}
-void helper_vmload(void)
+void helper_vmload(int aflag)
{
target_ulong addr;
helper_svm_check_intercept_param(SVM_EXIT_VMLOAD, 0);
- /* XXX: invalid in 32 bit */
- addr = EAX;
+ if (aflag == 2)
+ addr = EAX;
+ else
+ addr = (uint32_t)EAX;
+
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile,"vmload! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | "
TARGET_FMT_lx "\n",
addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)),
@@ -5003,11 +5010,16 @@
env->sysenter_eip = ldq_phys(addr + offsetof(struct vmcb,
save.sysenter_eip));
}
-void helper_vmsave(void)
+void helper_vmsave(int aflag)
{
target_ulong addr;
helper_svm_check_intercept_param(SVM_EXIT_VMSAVE, 0);
- addr = EAX;
+
+ if (aflag == 2)
+ addr = EAX;
+ else
+ addr = (uint32_t)EAX;
+
if (loglevel & CPU_LOG_TB_IN_ASM)
fprintf(logfile,"vmsave! " TARGET_FMT_lx "\nFS: %016" PRIx64 " | "
TARGET_FMT_lx "\n",
addr, ldq_phys(addr + offsetof(struct vmcb, save.fs.base)),
@@ -5050,15 +5062,22 @@
{
helper_svm_check_intercept_param(SVM_EXIT_SKINIT, 0);
/* XXX: not implemented */
- if (loglevel & CPU_LOG_TB_IN_ASM)
- fprintf(logfile,"skinit!\n");
raise_exception(EXCP06_ILLOP);
}
-void helper_invlpga(void)
+void helper_invlpga(int aflag)
{
+ target_ulong addr;
helper_svm_check_intercept_param(SVM_EXIT_INVLPGA, 0);
- tlb_flush(env, 0);
+
+ if (aflag == 2)
+ addr = EAX;
+ else
+ addr = (uint32_t)EAX;
+
+ /* XXX: could use the ASID to see if it is needed to do the
+ flush */
+ tlb_flush_page(env, addr);
}
void helper_svm_check_intercept_param(uint32_t type, uint64_t param)
Modified: trunk/target-i386/translate.c
===================================================================
--- trunk/target-i386/translate.c 2008-06-04 13:35:58 UTC (rev 4659)
+++ trunk/target-i386/translate.c 2008-06-04 13:53:05 UTC (rev 4660)
@@ -6569,7 +6569,8 @@
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
break;
} else {
- tcg_gen_helper_0_0(helper_vmrun);
+ tcg_gen_helper_0_1(helper_vmrun,
+ tcg_const_i32(s->aflag));
s->cc_op = CC_OP_EFLAGS;
gen_eob(s);
}
@@ -6586,7 +6587,8 @@
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
break;
} else {
- tcg_gen_helper_0_0(helper_vmload);
+ tcg_gen_helper_0_1(helper_vmload,
+ tcg_const_i32(s->aflag));
}
break;
case 3: /* VMSAVE */
@@ -6596,7 +6598,8 @@
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
break;
} else {
- tcg_gen_helper_0_0(helper_vmsave);
+ tcg_gen_helper_0_1(helper_vmsave,
+ tcg_const_i32(s->aflag));
}
break;
case 4: /* STGI */
@@ -6635,7 +6638,8 @@
gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
break;
} else {
- tcg_gen_helper_0_0(helper_invlpga);
+ tcg_gen_helper_0_1(helper_invlpga,
+ tcg_const_i32(s->aflag));
}
break;
default:
| [Prev in Thread] |
Current Thread |
[Next in Thread] |
- [Qemu-devel] [4660] 32 bit SVM fixes - INVLPG and INVLPGA updates,
Fabrice Bellard <=