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[Qemu-devel] [PATCH 2/2] ARM: fix smmul and smmla instructions
From: |
Mans Rullgard |
Subject: |
[Qemu-devel] [PATCH 2/2] ARM: fix smmul and smmla instructions |
Date: |
Mon, 1 Dec 2008 20:47:36 +0000 |
This fixes the destination and accumulator registers for the smmul
and smmla instructions.
Signed-off-by: Mans Rullgard <address@hidden>
---
target-arm/translate.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 424a4a6..d8f4d03 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6532,8 +6532,8 @@ static void disas_arm_insn(CPUState * env, DisasContext
*s)
tcg_gen_shri_i64(tmp64, tmp64, 32);
tmp = new_tmp();
tcg_gen_trunc_i64_i32(tmp, tmp64);
- if (rn != 15) {
- tmp2 = load_reg(s, rn);
+ if (rd != 15) {
+ tmp2 = load_reg(s, rd);
if (insn & (1 << 6)) {
tcg_gen_sub_i32(tmp, tmp, tmp2);
} else {
@@ -6541,7 +6541,7 @@ static void disas_arm_insn(CPUState * env, DisasContext
*s)
}
dead_tmp(tmp2);
}
- store_reg(s, rd, tmp);
+ store_reg(s, rn, tmp);
} else {
if (insn & (1 << 5))
gen_swap_half(tmp2);
--
1.6.0.4