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[Qemu-devel] [5962] MIPS Magnum: fix memory-mapped i8042
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [5962] MIPS Magnum: fix memory-mapped i8042 |
Date: |
Wed, 10 Dec 2008 15:02:08 +0000 |
Revision: 5962
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=5962
Author: aurel32
Date: 2008-12-10 15:02:07 +0000 (Wed, 10 Dec 2008)
Log Message:
-----------
MIPS Magnum: fix memory-mapped i8042
Current implementation of memory-mapped i8042 controller is atm
implemented with an interface shift (it_shift) parameter, like most all
memory-mapped devices in Qemu.
However, this isn't suitable for MIPS Magnum, where i8042 controller is at
0x80005000 up to 0x80005fff.
Thomas Bogendoerfer (from #mipslinux) tested the behaviour of a real
machine, and found that odd addresses are for status/command register, and
even addresses for data register.
Attached patch implements this behaviour by replacing the it_shift
parameter by a mask one.
Incidentally, keyboard now works on OpenBSD 2.3, which accesses i8042
controller at 0x80005060 and 0x80005061.
Signed-off-by: Herv?\195?\169 Poussineau <address@hidden>
Signed-off-by: Aurelien Jarno <address@hidden>
Modified Paths:
--------------
trunk/hw/mips_jazz.c
trunk/hw/pc.h
trunk/hw/pckbd.c
Modified: trunk/hw/mips_jazz.c
===================================================================
--- trunk/hw/mips_jazz.c 2008-12-09 20:09:57 UTC (rev 5961)
+++ trunk/hw/mips_jazz.c 2008-12-10 15:02:07 UTC (rev 5962)
@@ -229,7 +229,7 @@
cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc);
/* Keyboard (i8042) */
- i8042_mm_init(rc4030[6], rc4030[7], 0x80005000, 0);
+ i8042_mm_init(rc4030[6], rc4030[7], 0x80005000, 0x1000, 0x1);
/* Serial ports */
if (serial_hds[0])
Modified: trunk/hw/pc.h
===================================================================
--- trunk/hw/pc.h 2008-12-09 20:09:57 UTC (rev 5961)
+++ trunk/hw/pc.h 2008-12-10 15:02:07 UTC (rev 5962)
@@ -71,7 +71,8 @@
void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
- target_phys_addr_t base, int it_shift);
+ target_phys_addr_t base, ram_addr_t size,
+ target_phys_addr_t mask);
/* mc146818rtc.c */
Modified: trunk/hw/pckbd.c
===================================================================
--- trunk/hw/pckbd.c 2008-12-09 20:09:57 UTC (rev 5961)
+++ trunk/hw/pckbd.c 2008-12-10 15:02:07 UTC (rev 5962)
@@ -125,7 +125,7 @@
qemu_irq irq_kbd;
qemu_irq irq_mouse;
- int it_shift;
+ target_phys_addr_t mask;
} KBDState;
static KBDState kbd_state;
@@ -391,28 +391,20 @@
{
KBDState *s = opaque;
- switch (addr >> s->it_shift) {
- case 0:
- return kbd_read_data(s, 0) & 0xff;
- case 1:
+ if (addr & s->mask)
return kbd_read_status(s, 0) & 0xff;
- default:
- return 0xff;
- }
+ else
+ return kbd_read_data(s, 0) & 0xff;
}
static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t
value)
{
KBDState *s = opaque;
- switch (addr >> s->it_shift) {
- case 0:
- kbd_write_data(s, 0, value & 0xff);
- break;
- case 1:
+ if (addr & s->mask)
kbd_write_command(s, 0, value & 0xff);
- break;
- }
+ else
+ kbd_write_data(s, 0, value & 0xff);
}
static CPUReadMemoryFunc *kbd_mm_read[] = {
@@ -428,19 +420,20 @@
};
void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
- target_phys_addr_t base, int it_shift)
+ target_phys_addr_t base, ram_addr_t size,
+ target_phys_addr_t mask)
{
KBDState *s = &kbd_state;
int s_io_memory;
s->irq_kbd = kbd_irq;
s->irq_mouse = mouse_irq;
- s->it_shift = it_shift;
+ s->mask = mask;
kbd_reset(s);
register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
s_io_memory = cpu_register_io_memory(0, kbd_mm_read, kbd_mm_write, s);
- cpu_register_physical_memory(base, 2 << it_shift, s_io_memory);
+ cpu_register_physical_memory(base, size, s_io_memory);
s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
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