Index: target-ppc/translate.c
===================================================================
--- target-ppc/translate.c	(revision 6144)
+++ target-ppc/translate.c	(working copy)
@@ -6350,7 +6350,7 @@
     TCGv_i32 t0 = tcg_temp_local_new_i32();                                   \
     TCGv_i32 t1 = tcg_temp_local_new_i32();                                   \
     TCGv_i32 t2 = tcg_temp_local_new_i32();                                   \
-    TCGv_i64 t3 = tcg_temp_local_new(TCG_TYPE_I64);                           \
+    TCGv_i64 t3 = tcg_temp_local_new();                                       \
     tcg_gen_trunc_i64_i32(t0, cpu_gpr[rA(ctx->opcode)]);                      \
     tcg_gen_trunc_i64_i32(t2, cpu_gpr[rB(ctx->opcode)]);                      \
     tcg_op(t0, t0, t2);                                                       \
Index: target-sh4/translate.c
===================================================================
--- target-sh4/translate.c	(revision 6144)
+++ target-sh4/translate.c	(working copy)
@@ -785,8 +785,8 @@
 	{
 	    int label1 = gen_new_label();
 	    int label2 = gen_new_label();
-	    TCGv cmp1 = tcg_temp_local_new(TCG_TYPE_I32);
-	    TCGv cmp2 = tcg_temp_local_new(TCG_TYPE_I32);
+	    TCGv cmp1 = tcg_temp_local_new();
+	    TCGv cmp2 = tcg_temp_local_new();
 	    tcg_gen_xor_i32(cmp1, REG(B7_4), REG(B11_8));
 	    tcg_gen_andi_i32(cmp2, cmp1, 0xff000000);
 	    tcg_gen_brcondi_i32(TCG_COND_EQ, cmp2, 0, label1);
@@ -935,7 +935,7 @@
 	    int label2 = gen_new_label();
 	    int label3 = gen_new_label();
 	    int label4 = gen_new_label();
-	    TCGv shift = tcg_temp_local_new(TCG_TYPE_I32);
+	    TCGv shift = tcg_temp_local_new();
 	    tcg_gen_brcondi_i32(TCG_COND_LT, REG(B7_4), 0, label1);
 	    /* Rm positive, shift to the left */
 	    tcg_gen_andi_i32(shift, REG(B7_4), 0x1f);
@@ -966,7 +966,7 @@
 	    int label1 = gen_new_label();
 	    int label2 = gen_new_label();
 	    int label3 = gen_new_label();
-	    TCGv shift = tcg_temp_local_new(TCG_TYPE_I32);
+	    TCGv shift = tcg_temp_local_new();
 	    tcg_gen_brcondi_i32(TCG_COND_LT, REG(B7_4), 0, label1);
 	    /* Rm positive, shift to the left */
 	    tcg_gen_andi_i32(shift, REG(B7_4), 0x1f);
@@ -1645,9 +1645,9 @@
     case 0x401b:		/* tas.b @Rn */
 	{
 	    TCGv addr, val;
-	    addr = tcg_temp_local_new(TCG_TYPE_I32);
+	    addr = tcg_temp_local_new();
 	    tcg_gen_mov_i32(addr, REG(B11_8));
-	    val = tcg_temp_local_new(TCG_TYPE_I32);
+	    val = tcg_temp_local_new();
 	    tcg_gen_qemu_ld8u(val, addr, ctx->memidx);
 	    gen_cmp_imm(TCG_COND_EQ, val, 0);
 	    tcg_gen_ori_i32(val, val, 0x80);
Index: tcg/tcg-op.h
===================================================================
--- tcg/tcg-op.h	(revision 6144)
+++ tcg/tcg-op.h	(working copy)
@@ -1693,7 +1693,7 @@
 #define tcg_temp_new() tcg_temp_new_i32()
 #define tcg_global_reg_new tcg_global_reg_new_i32
 #define tcg_global_mem_new tcg_global_mem_new_i32
-#define tcg_temp_local_new(t) tcg_temp_local_new_i32()
+#define tcg_temp_local_new() tcg_temp_local_new_i32()
 #define tcg_temp_free tcg_temp_free_i32
 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i32
 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i32
@@ -1704,7 +1704,7 @@
 #define tcg_temp_new() tcg_temp_new_i64()
 #define tcg_global_reg_new tcg_global_reg_new_i64
 #define tcg_global_mem_new tcg_global_mem_new_i64
-#define tcg_temp_local_new(t) tcg_temp_local_new_i64()
+#define tcg_temp_local_new() tcg_temp_local_new_i64()
 #define tcg_temp_free tcg_temp_free_i64
 #define tcg_gen_qemu_ldst_op tcg_gen_op3i_i64
 #define tcg_gen_qemu_ldst_op_i64 tcg_gen_qemu_ldst_op_i64_i64