[Qemu-devel] Re: [PATCH] return default values for apic probe functions.

[Jan Kiszka]

Glauber Costa wrote:
> As KVM cpus runs on threads, it is possible that
> we call kvm_load_registers() from a cpu thread, while the
> apic has not yet fully initialized. kvm_load_registers() is called
> from ap_main_loop.
> 
> This is not a problem when we're starting the whole machine together,
> but is a problem for hotplug, since we don't have the protection
> of the locks that protect machine initialization. Currently, some executions
> of cpu hotplug on rainy sundays fail with a segfault.
> 
> Moving apic initialization to before kvm_init_vpcu proved fruitful,
> as there are some dependencies involved. (kvm irqchip would fail to
> initialize).
> 
> This patch provides default values to be used for tpr and apic_base,
> that will be returned when the apic is not yet properly initialized.
> It is aimed at kvm, where the problem exists, but it could equally be
> used for qemu too, if there is agreement.
> 
> Signed-off-by: Glauber Costa <address@hidden>
> ---
>  qemu/hw/apic.c |   12 ++++++++++--
>  1 files changed, 10 insertions(+), 2 deletions(-)
> 
> diff --git a/qemu/hw/apic.c b/qemu/hw/apic.c
> index b926508..06fb9b5 100644
> --- a/qemu/hw/apic.c
> +++ b/qemu/hw/apic.c
> @@ -301,7 +301,12 @@ uint64_t cpu_get_apic_base(CPUState *env)
>  #ifdef DEBUG_APIC
>      printf("cpu_get_apic_base: %016" PRIx64 "\n", (uint64_t)s->apicbase);
>  #endif
> -    return s->apicbase;
> +    if (s) {
> +        return s->apicbase;
> +    }
> +    else {
> +        return 0xfee00000 | MSR_IA32_APICBASE_ENABLE;
> +    }
>  }

Even on sunny days, this collides with QEMU commit #7048. :)

Does Intel specify what non-existent MSRs should return, ie. is your
version still correct if !s->apicbase means that there is actually no
APIC? And does kvm depend on the default base? If so, I would say:
provide a patch against upstream.

>  
>  void cpu_set_apic_tpr(CPUX86State *env, uint8_t val)
> @@ -314,7 +319,10 @@ void cpu_set_apic_tpr(CPUX86State *env, uint8_t val)
>  uint8_t cpu_get_apic_tpr(CPUX86State *env)
>  {
>      APICState *s = env->apic_state;
> -    return s->tpr >> 4;
> +    if (s)
> +        return s->tpr >> 4;
> +    else
> +        return 0;
>  }
>  
>  /* return -1 if no bit is set */

This is already upstream.

Jan

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