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Re: [Qemu-devel] [PATCH] sparc64 support TSB related MMU registers

From: Igor Kovalenko
Subject: Re: [Qemu-devel] [PATCH] sparc64 support TSB related MMU registers
Date: Sun, 26 Apr 2009 23:24:46 +0400

On Fri, Apr 24, 2009 at 9:42 PM, Blue Swirl <address@hidden> wrote:
> On 4/24/09, Igor Kovalenko <address@hidden> wrote:
>> Hi!
>>  This change allows reading ultrasparc I/D MMU TSB tag target register
>>  and TSB pointer register (8k and 64k).
>>  Linux kernel uses TSB for memory management, and with this change it
>>  now can use early allocation routines.
>>  I'm testing with linux- minimalistic sparc64 uniprocessor
>>  build, now kernel is able to start build device tree.
>>  Without the change kernel was not able to handle D-MMU miss while
>>  creating first device tree node.
>>  Currently it stops shortly after building device tree, trying to find
>>  out path to console.
> Nice, though I didn't notice any visible improvement in my tests.

Here is the missing part in qemu-sparc64-mmu-pagesize.patch
This fixes TLB match code to respect page size, otherwise 4M page
mappings may be not found.
Also this corrects a typo in get_physical_address_code which uses a
register from DMMU instead of IMMU.

Please apply.

get_physical_address_data/code probably needs some code reuse refactoring.

>>  (PS with openbios instance-to-path method fails in client interface
>>  call, in the same way
>>  it fails without loading kernel when I try invoking get-instance-path
>>  on stdin handle from command prompt.
>>  there fmove invokes memmove() with size argument looking like some
>>  pointer which leads to unhandled D-MMU fault)
> Similar very obscure problem was fixed with PPC (r481), the bug was
> with the PCI nodes.

Here (r484) on sparc64 it hangs in the same place.

Kind regards,
Igor V. Kovalenko

Attachment: qemu-sparc64-mmu-pagesize.patch
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