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[Qemu-devel] [PATCH 08/17] m68k: modify movem instruction to manage word
From: |
Laurent Vivier |
Subject: |
[Qemu-devel] [PATCH 08/17] m68k: modify movem instruction to manage word |
Date: |
Sat, 30 May 2009 00:41:52 +0200 |
This patch modifies "movem" to manage "word" and "long" register size
instead of only "word". Attach it to M68000 feature.
Signed-off-by: Andreas Schwab <address@hidden>
Signed-off-by: Laurent Vivier <address@hidden>
---
target-m68k/translate.c | 52 +++++++++++++++++++++++++++++++++-------------
1 files changed, 37 insertions(+), 15 deletions(-)
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index f2a0c92..c869cf9 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -1176,6 +1176,8 @@ DISAS_INSN(movem)
TCGv reg;
TCGv tmp;
int is_load;
+ int opsize;
+ int32_t incr;
mask = lduw_code(s->pc);
s->pc += 2;
@@ -1187,21 +1189,40 @@ DISAS_INSN(movem)
addr = tcg_temp_new();
tcg_gen_mov_i32(addr, tmp);
is_load = ((insn & 0x0400) != 0);
- for (i = 0; i < 16; i++, mask >>= 1) {
- if (mask & 1) {
- if (i < 8)
- reg = DREG(i, 0);
- else
- reg = AREG(i, 0);
- if (is_load) {
- tmp = gen_load(s, OS_LONG, addr, 0);
- tcg_gen_mov_i32(reg, tmp);
- } else {
- gen_store(s, OS_LONG, addr, reg);
- }
- if (mask != 1)
- tcg_gen_addi_i32(addr, addr, 4);
- }
+ opsize = (insn & 0x40) != 0 ? OS_LONG : OS_WORD;
+ incr = opsize_bytes(opsize);
+ if (!is_load && (insn & 070) == 040) {
+ for (i = 15; i >= 0; i--, mask >>= 1) {
+ if (mask & 1) {
+ if (i < 8)
+ reg = DREG(i, 0);
+ else
+ reg = AREG(i, 0);
+ gen_store(s, opsize, addr, reg);
+ if (mask != 1)
+ tcg_gen_subi_i32(addr, addr, incr);
+ }
+ }
+ tcg_gen_mov_i32(AREG(insn, 0), addr);
+ } else {
+ for (i = 0; i < 16; i++, mask >>= 1) {
+ if (mask & 1) {
+ if (i < 8)
+ reg = DREG(i, 0);
+ else
+ reg = AREG(i, 0);
+ if (is_load) {
+ tmp = gen_load(s, opsize, addr, 1);
+ tcg_gen_mov_i32(reg, tmp);
+ } else {
+ gen_store(s, opsize, addr, reg);
+ }
+ if (mask != 1 || (insn & 070) == 030)
+ tcg_gen_addi_i32(addr, addr, incr);
+ }
+ }
+ if ((insn & 070) == 030)
+ tcg_gen_mov_i32(AREG(insn, 0), addr);
}
}
@@ -2975,6 +2996,7 @@ void register_m68k_insns (CPUM68KState *env)
INSN(swap, 4840, fff8, CF_ISA_A);
INSN(swap, 4840, fff8, M68000);
INSN(movem, 48c0, fbc0, CF_ISA_A);
+ INSN(movem, 48c0, fbc0, M68000);
INSN(ext, 4880, fff8, CF_ISA_A);
INSN(ext, 4880, fff8, M68000);
INSN(ext, 48c0, fff8, CF_ISA_A);
--
1.5.6.5
- [Qemu-devel] [PATCH 00/17] m68k: add partial Motorola 680x0 support, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 01/17] m68k: Replace gen_im32() by tcg_const_i32(), Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 02/17] m68k: add tcg_gen_debug_insn_start(), Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 03/17] m68k: define m680x0 CPUs and features, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 04/17] m68k: add missing accessing modes for some instructions., Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 05/17] m68k: add Motorola 680x0 family common instructions., Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 06/17] m68k: add Scc instruction with memory operand., Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 07/17] m68k: add DBcc instruction., Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 08/17] m68k: modify movem instruction to manage word,
Laurent Vivier <=
- [Qemu-devel] [PATCH 09/17] m68k: add 64bit divide., Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 10/17] m68k: add 32bit and 64bit multiply, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 11/17] m68k: add word data size for suba/adda, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 12/17] m68k: add fpu, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 13/17] m68k: add "byte", "word" and memory shift, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 14/17] m68k: add "byte", "word" and memory rotate., Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 15/17] m68k: add bitfield_mem, bitfield_reg, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 16/17] m68k: add variable offset/width to bitfield_reg/bitfield_mem, Laurent Vivier, 2009/05/29
- [Qemu-devel] [PATCH 17/17] m68k: add cas, Laurent Vivier, 2009/05/29
- [Qemu-devel] Re: [PATCH 17/17] m68k: add cas, Andreas Schwab, 2009/05/30