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[Qemu-devel] Re: sparc sun4m changes

From: Blue Swirl
Subject: [Qemu-devel] Re: sparc sun4m changes
Date: Thu, 13 Aug 2009 21:18:58 +0300

On Mon, Aug 10, 2009 at 4:57 AM, Robert Reif<address@hidden> wrote:
> I just took a look at the sun4m interrupt controller and noticed
> the recent changes.  There are at least 3 different interrupt
> controllers used by sun4m: ss600mp with VME and MBUS
> specific support, ss 10/20 with MBUS support and ss 4/5/lx
> with slavio support.  This doesn't even address the java stations.
> intbit_to_level in slavio_intctrl.c needs to be different for each
> controller chip used.  There also needs to be a controller specific
> interrupt mask used.
> The NCR slavio chip is only used for single processor systems
> (ss 4/5/lx).  It is a subset of the ss 10/20 which is a subset of the
> ss600mp.  We really should address these differences.

I think the differences should be supported with a "model" or
"version" property rather than the intbit table, which didn't fit the
qdev model well.

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