[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH 2/2] Route IOAPIC interrupts via ISA bus

From: Gerd Hoffmann
Subject: Re: [Qemu-devel] [PATCH 2/2] Route IOAPIC interrupts via ISA bus
Date: Thu, 27 Aug 2009 09:40:06 +0200
User-agent: Mozilla/5.0 (X11; U; Linux x86_64; en-US; rv: Gecko/20090814 Fedora/3.0-2.6.b3.fc11 Lightning/1.0pre Thunderbird/3.0b3

On 08/26/09 21:09, Gleb Natapov wrote:
On Wed, Aug 26, 2009 at 06:30:54PM +0200, Gerd Hoffmann wrote:
Right now we have IRQs 5,10,11 for PCI.  Having one more IRQ (so we
have one for each link) would be useful IMHO.  eight links + eight
irqs would be even more useful.  What needs to be done for that?

Current code uses piix3 irq router to route pci interrupts to pic _and_
ioapic and piix3 irq router supports only 16 interrupts.

That means? We could add four more PCI links which have IRQs routed through another IRQ router chip and link them to ioapic lines 17-23 that way? Or does it mean we must emulate a more recent chipset?


reply via email to

[Prev in Thread] Current Thread [Next in Thread]