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[Qemu-devel] [PATCH 11/12] cpuid: add TCG feature bit trimming
From: |
Andre Przywara |
Subject: |
[Qemu-devel] [PATCH 11/12] cpuid: add TCG feature bit trimming |
Date: |
Fri, 11 Sep 2009 00:20:56 +0200 |
In KVM we trim the user provided CPUID bits to match the host CPU's
one. Introduce a similar feature to QEMU/TCG. Create a mask of TCG's
capabilities and apply it to the user bits.
This allows to let the CPU models reflect their native archetypes.
(which will be send in a later patch).
Signed-off-by: Andre Przywara <address@hidden>
---
target-i386/cpuid.c | 27 ++++++++++++++++++++++++---
1 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/target-i386/cpuid.c b/target-i386/cpuid.c
index ca8fc45..b35523c 100644
--- a/target-i386/cpuid.c
+++ b/target-i386/cpuid.c
@@ -118,6 +118,19 @@ typedef struct x86_def_t {
CPUID_PAE | CPUID_SEP | CPUID_APIC)
#define EXT2_FEATURE_MASK 0x0183F3FF
+#define TCG_FEATURES (CPUID_FP87 | CPUID_PSE | CPUID_TSC | CPUID_MSR | \
+ CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC | CPUID_SEP | \
+ CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
+ CPUID_PSE36 | CPUID_CLFLUSH | CPUID_ACPI | CPUID_MMX | \
+ CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS)
+#define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | \
+ CPUID_EXT_CX16 | CPUID_EXT_POPCNT | CPUID_EXT_XSAVE | \
+ CPUID_EXT_HYPERVISOR)
+#define TCG_EXT2_FEATURES ((TCG_FEATURES & EXT2_FEATURE_MASK) | \
+ CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | \
+ CPUID_EXT2_3DNOWEXT)
+#define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM)
+
static x86_def_t x86_defs[] = {
#ifdef TARGET_X86_64
{
@@ -588,6 +601,17 @@ int cpu_x86_register (CPUX86State *env, const char
*cpu_model)
env->cpuid_ext2_features = def->ext2_features;
env->cpuid_xlevel = def->xlevel;
env->cpuid_ext3_features = def->ext3_features;
+ if (!kvm_enabled()) {
+ env->cpuid_features &= TCG_FEATURES;
+ env->cpuid_ext_features &= TCG_EXT_FEATURES;
+ env->cpuid_ext2_features &= (TCG_EXT2_FEATURES
+#ifdef TARGET_X86_64
+ | CPUID_EXT2_SYSCALL | CPUID_EXT2_LM);
+#else
+ );
+#endif
+ env->cpuid_ext3_features &= TCG_EXT3_FEATURES;
+ }
{
const char *model_id = def->model_id;
int c, len, i;
@@ -755,9 +779,6 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
if (kvm_enabled()) {
/* Nested SVM not yet supported in upstream QEMU */
*ecx &= ~CPUID_EXT3_SVM;
- } else {
- /* AMD 3DNow! is not supported in QEMU */
- *edx &= ~(CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT);
}
break;
case 0x80000002:
--
1.6.1.3
- [Qemu-devel] [PATCH 02/12] cpuid: fix over-long lines, (continued)
- [Qemu-devel] [PATCH 02/12] cpuid: fix over-long lines, Andre Przywara, 2009/09/10
- [Qemu-devel] [PATCH 01/12] cpuid: move CPUID functions into separate file, Andre Przywara, 2009/09/10
- [Qemu-devel] [PATCH 03/12] cpuid: replace magic number with named constant, Andre Przywara, 2009/09/10
- [Qemu-devel] [PATCH 05/12] cpuid: moved host_cpuid function and remove prototype, Andre Przywara, 2009/09/10
- [Qemu-devel] [PATCH 04/12] cpuid: fix comments, Andre Przywara, 2009/09/10
- [Qemu-devel] [PATCH 09/12] cpuid: simplify CPUID flag search function, Andre Przywara, 2009/09/10
- [Qemu-devel] [PATCH 06/12] cpuid: add missing CPUID feature flag names, Andre Przywara, 2009/09/10
- [Qemu-devel] [PATCH 11/12] cpuid: add TCG feature bit trimming,
Andre Przywara <=
- [Qemu-devel] [PATCH 08/12] cpuid: remove unnecessary kvm_trim function, Andre Przywara, 2009/09/10
- [Qemu-devel] [PATCH 12/12] cpuid: decrease L2 cache for Intel and add comments, Andre Przywara, 2009/09/10
- [Qemu-devel] [PATCH 10/12] cpuid: propagate further CPUID leafs when -cpu host, Andre Przywara, 2009/09/10
- [Qemu-devel] [PATCH 07/12] cpuid: list all known x86 CPUID feature flags, Andre Przywara, 2009/09/10
- Re: [Qemu-devel] [PATCH 0/12] cpuid: cleanup and some enhancements, Amit Shah, 2009/09/11
- Re: [Qemu-devel] [PATCH 0/12] cpuid: cleanup and some enhancements, Anthony Liguori, 2009/09/14