[Qemu-devel] [PATCH v2 4/4] MC146818: Switch to host_clock

[Jan Kiszka]

Move the RTC emuation, including all its timer IRQ sources, over to
host_clock. This aligns MC146818 with most other RTC emulation that
already use the host's system time. It allows guests, specifically x86,
to use the RTC as a reference clock, provided the host clock is
synchronized against an accurate reference, e.g. via NTP. The guest then
no longer needs to run NTP-like services, which is useful for
network-less guest configurations or for guests that cannot be changed
easily to add NTP support.

Signed-off-by: Jan Kiszka <address@hidden>
---

 hw/mc146818rtc.c |   35 ++++++++++++++++-------------------
 1 files changed, 16 insertions(+), 19 deletions(-)

diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c
index a1ff9ba..7b9f110 100644
--- a/hw/mc146818rtc.c
+++ b/hw/mc146818rtc.c
@@ -108,8 +108,8 @@ static void rtc_coalesced_timer_update(RTCState *s)
     } else {
         /* divide each RTC interval to 2 - 8 smaller intervals */
         int c = MIN(s->irq_coalesced, 7) + 1; 
-        int64_t next_clock = qemu_get_clock(vm_clock) +
-               muldiv64(s->period / c, ticks_per_sec, 32768);
+        int64_t next_clock = qemu_get_clock(host_clock) +
+            muldiv64(s->period / c, ticks_per_sec, 32768);
         qemu_mod_timer(s->coalesced_timer, next_clock);
     }
 }
@@ -232,7 +232,7 @@ static void cmos_ioport_write(void *opaque, uint32_t addr, 
uint32_t data)
             /* UIP bit is read only */
             s->cmos_data[RTC_REG_A] = (data & ~REG_A_UIP) |
                 (s->cmos_data[RTC_REG_A] & REG_A_UIP);
-            rtc_timer_update(s, qemu_get_clock(vm_clock));
+            rtc_timer_update(s, qemu_get_clock(host_clock));
             break;
         case RTC_REG_B:
             if (data & REG_B_SET) {
@@ -246,7 +246,7 @@ static void cmos_ioport_write(void *opaque, uint32_t addr, 
uint32_t data)
                 }
             }
             s->cmos_data[RTC_REG_B] = data;
-            rtc_timer_update(s, qemu_get_clock(vm_clock));
+            rtc_timer_update(s, qemu_get_clock(host_clock));
             break;
         case RTC_REG_C:
         case RTC_REG_D:
@@ -605,18 +605,17 @@ static int rtc_initfn(ISADevice *dev)
 
     rtc_set_date_from_host(s);
 
-    s->periodic_timer = qemu_new_timer(vm_clock,
-                                       rtc_periodic_timer, s);
+    s->periodic_timer = qemu_new_timer(host_clock, rtc_periodic_timer, s);
 #ifdef TARGET_I386
     if (rtc_td_hack)
-        s->coalesced_timer = qemu_new_timer(vm_clock, rtc_coalesced_timer, s);
+        s->coalesced_timer =
+            qemu_new_timer(host_clock, rtc_coalesced_timer, s);
 #endif
-    s->second_timer = qemu_new_timer(vm_clock,
-                                     rtc_update_second, s);
-    s->second_timer2 = qemu_new_timer(vm_clock,
-                                      rtc_update_second2, s);
+    s->second_timer = qemu_new_timer(host_clock, rtc_update_second, s);
+    s->second_timer2 = qemu_new_timer(host_clock, rtc_update_second2, s);
 
-    s->next_second_time = qemu_get_clock(vm_clock) + (ticks_per_sec * 99) / 
100;
+    s->next_second_time =
+        qemu_get_clock(host_clock) + (ticks_per_sec * 99) / 100;
     qemu_mod_timer(s->second_timer2, s->next_second_time);
 
     register_ioport_write(base, 2, 1, cmos_ioport_write, s);
@@ -747,14 +746,12 @@ RTCState *rtc_mm_init(target_phys_addr_t base, int 
it_shift, qemu_irq irq,
     s->base_year = base_year;
     rtc_set_date_from_host(s);
 
-    s->periodic_timer = qemu_new_timer(vm_clock,
-                                       rtc_periodic_timer, s);
-    s->second_timer = qemu_new_timer(vm_clock,
-                                     rtc_update_second, s);
-    s->second_timer2 = qemu_new_timer(vm_clock,
-                                      rtc_update_second2, s);
+    s->periodic_timer = qemu_new_timer(host_clock, rtc_periodic_timer, s);
+    s->second_timer = qemu_new_timer(host_clock, rtc_update_second, s);
+    s->second_timer2 = qemu_new_timer(host_clock, rtc_update_second2, s);
 
-    s->next_second_time = qemu_get_clock(vm_clock) + (ticks_per_sec * 99) / 
100;
+    s->next_second_time =
+        qemu_get_clock(host_clock) + (ticks_per_sec * 99) / 100;
     qemu_mod_timer(s->second_timer2, s->next_second_time);
 
     io_memory = cpu_register_io_memory(rtc_mm_read, rtc_mm_write, s);