Re: [Qemu-devel] [PATCH 1/3] tcg: add ext{8,16,32}u_i{32,64} TCG ops

[Paul Brook]

On Wednesday 30 September 2009, Aurelien Jarno wrote:
> Currently zero extensions ops are implemented by a and op with a
> constant. This is then catched in some backend, and replaced by
> a zero extension instruction. While this works well on RISC
> machines, this adds a useless register move on non-RISC machines.
> 
> Example on x86:
>   ext16u_i32 r1, r2
> is translated into
>   mov    %eax,%ebx
>   movzwl %bx, %ebx
> while the optimized version should be:
>   movzwl %ax, %ebx

I don't like your solution. Having two operations that do the same thing is 
bad, especially when we have no way of converting one into the other, and no 
clear indication which is best.

I think we need to understand why does the original code introduces an extra 
copy. At first glance there's no good reason for it to be there.

Paul