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[Qemu-devel] Re: [PATCH 0/4] pci: interrupt status/interrupt disable sup
[Qemu-devel] Re: [PATCH 0/4] pci: interrupt status/interrupt disable support
Thu, 26 Nov 2009 12:21:46 +0900
On Wed, Nov 25, 2009 at 06:58:34PM +0200, Michael S. Tsirkin wrote:
> This patchset adds support for mandatory interupt
> status and interrupt disable bits to all
> PCI devices. This is required for PCI compliancy.
> These patches are on top of my pci tree,
> including Isaku Yamahata's fixes.
> If this is a problem, let me know and
> I will rebase.
> This works fine for me, but since this touches
> all PCI devices, please review carefully.
Just a curiosity, what OS do you have in your mind?
You introduced new members, irq_status and irq_disabled
and maintain them according configuration space write.
Another approach is to use irq_state[PCI_NUM_PINS] and interrupt disabled
bit in command register.
At least I think irq_disable can be removed by moving !change check
from pci_set_irq() into pci_change_irq_level().
As for irq_status, only user of irq_status is pci_update_irq_status()
so if (irq_statue) can be open coded. On the other hand,
PCIBus already has irq_count member for same purpose.
So probably open coding or introducing irq_count instead of irq_status
would be reasonable.
> Michael S. Tsirkin (4):
> pci: rearrange code for interrupts
> pci: track IRQ status
> pci: interrupt status bit implementation
> pci: interrupt disable bit support
> hw/pci.c | 83
> hw/pci.h | 8 ++++++
> 2 files changed, 79 insertions(+), 12 deletions(-)
[Qemu-devel] Re: [PATCH 0/4] pci: interrupt status/interrupt disable support, Michael S. Tsirkin, 2009/11/26