diff --git a/fpu/softfloat-native.h b/fpu/softfloat-native.h index 0893ce3..592beca 100644 --- a/fpu/softfloat-native.h +++ b/fpu/softfloat-native.h @@ -21,7 +21,7 @@ */ #if defined(CONFIG_SOLARIS) && \ ((CONFIG_SOLARIS_VERSION <= 9 ) || \ - ((CONFIG_SOLARIS_VERSION >= 10) && (__GNUC__ < 4))) \ + ((CONFIG_SOLARIS_VERSION == 10) && (__GNUC__ < 4))) \ || (defined(__OpenBSD__) && (OpenBSD < 200811)) /* * C99 7.12.3 classification macros diff --git a/net/tap-solaris.c b/net/tap-solaris.c index ef4e60c..05dcfc1 100644 --- a/net/tap-solaris.c +++ b/net/tap-solaris.c @@ -23,6 +23,7 @@ */ #include "net/tap.h" +#include "sysemu.h" #include #include diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 63aead9..a742133 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -83,6 +83,7 @@ #define PSR_OVF (1 << PSR_OVF_SHIFT) #define PSR_CARRY_SHIFT 20 #define PSR_CARRY (1 << PSR_CARRY_SHIFT) +#if !defined(CONFIG_SOLARIS) #define PSR_ICC (PSR_NEG|PSR_ZERO|PSR_OVF|PSR_CARRY) #define PSR_EF (1<<12) #define PSR_PIL 0xf00 @@ -90,6 +91,7 @@ #define PSR_PS (1<<6) #define PSR_ET (1<<5) #define PSR_CWP 0x1f +#endif #define CC_SRC (env->cc_src) #define CC_SRC2 (env->cc_src2) @@ -129,8 +131,9 @@ enum { #define PS_IE (1<<1) #define PS_AG (1<<0) /* v9, zero on UA2007 */ +#if !defined(CONFIG_SOLARIS) #define FPRS_FEF (1<<2) - +#endif #define HS_PRIV (1<<2) #endif @@ -187,7 +190,9 @@ enum { #define FSR_FTT_INVAL_FPR (6ULL << 14) #define FSR_FCC1_SHIFT 11 +#if !defined(CONFIG_SOLARIS) #define FSR_FCC1 (1ULL << FSR_FCC1_SHIFT) +#endif #define FSR_FCC0_SHIFT 10 #define FSR_FCC0 (1ULL << FSR_FCC0_SHIFT)