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Re: [Qemu-devel] [PATCH 6/9] sparc64: clear exception_index with -1 val
From: |
Igor Kovalenko |
Subject: |
Re: [Qemu-devel] [PATCH 6/9] sparc64: clear exception_index with -1 value |
Date: |
Thu, 7 Jan 2010 02:57:28 +0300 |
On Thu, Jan 7, 2010 at 2:29 AM, Artyom Tarasenko
<address@hidden> wrote:
> What's the effect of the patch? Don't we need it for sparc32 too? The
> code looks similar.
>
> 2010/1/6 Blue Swirl <address@hidden>:
>> Thanks, applied.
>>
>> On Tue, Jan 5, 2010 at 11:19 PM, Igor V. Kovalenko
>> <address@hidden> wrote:
>>> From: Igor V. Kovalenko <address@hidden>
>>>
>>> Signed-off-by: Igor V. Kovalenko <address@hidden>
>>> ---
>>> target-sparc/op_helper.c | 2 +-
>>> 1 files changed, 1 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
>>> index b1978cb..94f1c7a 100644
>>> --- a/target-sparc/op_helper.c
>>> +++ b/target-sparc/op_helper.c
>>> @@ -3535,7 +3535,7 @@ void do_interrupt(CPUState *env)
>>> env->tbr |= ((env->tl > 1) ? 1 << 14 : 0) | (intno << 5);
>>> env->pc = env->tbr;
>>> env->npc = env->pc + 4;
>>> - env->exception_index = 0;
>>> + env->exception_index = -1;
>>> }
>>> #else
>>> #ifdef DEBUG_PCALL
Right, but that's out of scope for this changeset.
In fact sparc32 should have the same issue, as well as alpha, s390 and
sh4. Check in cpu_exec() for valid exception_index is "greater or
equal to zero" so all those targets should be corrected. On sh4 we
even check for "invalid value of exception_index is -1"
--
Kind regards,
Igor V. Kovalenko
- Re: [Qemu-devel] [PATCH 2/9] sparc64: add PSR and PIL to cpu state dump, (continued)
[Qemu-devel] [PATCH 7/9] sparc64: move cpu_interrupts_enabled to cpu.h, Igor V. Kovalenko, 2010/01/05
[Qemu-devel] [PATCH 8/9] sparc64: interrupt trap handling, Igor V. Kovalenko, 2010/01/05