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[Qemu-devel] [PATCH 4/8] target-sh4: MMU: fix ITLB priviledge check
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH 4/8] target-sh4: MMU: fix ITLB priviledge check |
Date: |
Sat, 6 Feb 2010 17:43:39 +0100 |
There is an ITLB access violation if SR_MD=0 (user mode) while
the high bit of the protection key is 0 (priviledge mode).
Signed-off-by: Aurelien Jarno <address@hidden>
---
target-sh4/helper.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-sh4/helper.c b/target-sh4/helper.c
index f9bf5e2..589efe4 100644
--- a/target-sh4/helper.c
+++ b/target-sh4/helper.c
@@ -377,7 +377,7 @@ static int get_mmu_address(CPUState * env, target_ulong *
physical,
n = find_itlb_entry(env, address, use_asid, 1);
if (n >= 0) {
matching = &env->itlb[n];
- if ((env->sr & SR_MD) & !(matching->pr & 2))
+ if (!(env->sr & SR_MD) && !(matching->pr & 2))
n = MMU_ITLB_VIOLATION;
else
*prot = PAGE_READ;
--
1.6.6.1
- [Qemu-devel] [PATCH 0/8] SH4 MMU fixes and optimisation, Aurelien Jarno, 2010/02/06
- [Qemu-devel] [PATCH 7/8] target-sh4: MMU: remove dead code, Aurelien Jarno, 2010/02/06
- [Qemu-devel] [PATCH 2/8] target-sh4: MMU: fix mem_idx computation, Aurelien Jarno, 2010/02/06
- [Qemu-devel] [PATCH 6/8] target-sh4: MMU: reduce the size of a TLB entry, Aurelien Jarno, 2010/02/06
- [Qemu-devel] [PATCH 8/8] target-sh4: MMU: fix store queue addresses, Aurelien Jarno, 2010/02/06
- [Qemu-devel] [PATCH 3/8] target-sh4: MMU: simplify call to tlb_set_page(), Aurelien Jarno, 2010/02/06
- [Qemu-devel] [PATCH 1/8] sh7750: handle MMUCR TI bit, Aurelien Jarno, 2010/02/06
- [Qemu-devel] [PATCH 5/8] target-sh4: MMU: optimize UTLB accesses, Aurelien Jarno, 2010/02/06
- [Qemu-devel] [PATCH 4/8] target-sh4: MMU: fix ITLB priviledge check,
Aurelien Jarno <=