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[Qemu-devel] [PATCH 02/18] tcg/arm: explicitely list clobbered/reserved
From: |
Aurelien Jarno |
Subject: |
[Qemu-devel] [PATCH 02/18] tcg/arm: explicitely list clobbered/reserved regs |
Date: |
Wed, 7 Apr 2010 19:51:09 +0200 |
Instead of writing very compact code, declare all registers that are
clobbered or reserved one by one. This makes the code easier to read.
Also declare all the 16 registers to TCG, and mark pc as reserved.
Signed-off-by: Aurelien Jarno <address@hidden>
---
tcg/arm/tcg-target.c | 13 +++++++++----
tcg/arm/tcg-target.h | 3 ++-
2 files changed, 11 insertions(+), 5 deletions(-)
diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c
index e86ed9a..35f6c47 100644
--- a/tcg/arm/tcg-target.c
+++ b/tcg/arm/tcg-target.c
@@ -39,6 +39,7 @@ static const char * const
tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
"%r12",
"%r13",
"%r14",
+ "%pc",
};
#endif
@@ -1580,15 +1581,19 @@ void tcg_target_init(TCGContext *s)
tcg_abort();
#endif
- tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0,
- ((2 << TCG_REG_R14) - 1) & ~(1 << TCG_REG_R8));
+ tcg_regset_set32(tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffff);
tcg_regset_set32(tcg_target_call_clobber_regs, 0,
- ((2 << TCG_REG_R3) - 1) |
- (1 << TCG_REG_R12) | (1 << TCG_REG_R14));
+ (1 << TCG_REG_R0) |
+ (1 << TCG_REG_R1) |
+ (1 << TCG_REG_R2) |
+ (1 << TCG_REG_R3) |
+ (1 << TCG_REG_R12) |
+ (1 << TCG_REG_R14));
tcg_regset_clear(s->reserved_regs);
tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK);
tcg_regset_set_reg(s->reserved_regs, TCG_REG_R8);
+ tcg_regset_set_reg(s->reserved_regs, TCG_REG_PC);
tcg_add_target_add_op_defs(arm_op_defs);
}
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 6d58de8..a0027b5 100644
--- a/tcg/arm/tcg-target.h
+++ b/tcg/arm/tcg-target.h
@@ -44,9 +44,10 @@ enum {
TCG_REG_R12,
TCG_REG_R13,
TCG_REG_R14,
+ TCG_REG_PC,
};
-#define TCG_TARGET_NB_REGS 15
+#define TCG_TARGET_NB_REGS 16
#define TCG_CT_CONST_ARM 0x100
--
1.7.0.4
- [Qemu-devel] [PATCH 0/18] tcg/arm: cleanup and improvements, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 02/18] tcg/arm: explicitely list clobbered/reserved regs,
Aurelien Jarno <=
- [Qemu-devel] [PATCH 01/18] tcg/arm: remove SAVE_LR code, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 05/18] tcg/arm: align 64-bit arguments in function calls, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 09/18] tcg/arm: add rotation ops, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 07/18] tcg/arm: sxtb and sxth are available starting with ARMv6, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 11/18] tcg/arm: add bswap ops, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 08/18] tcg/arm: use the blx instruction when possible, Aurelien Jarno, 2010/04/07
- [Qemu-devel] [PATCH 06/18] tcg/arm: add defines for the allowed instructions set, Aurelien Jarno, 2010/04/07