[Qemu-devel] Re: singlestep and sparc32

[Stefan Weil]

Artyom Tarasenko schrieb:
> is -single-step option supposed to work under qemu-system-sparc? Or is
> it only for non-pipelined CPUs?
>
> I get pretty strange results: some addresses seem to be executed
> twice, and then qemu hangs on the last nop:
>
> --------------
> IN:
> 0x00000000: b 0xb788
> --------------
> IN:
> 0x00000004: rd %psr, %l0
> --------------
> IN:
> 0x00000004: rd %psr, %l0
> --------------
> IN:
> 0x00000008: nop
> --------------
> IN:
> 0x00000008: nop
> --------------
> IN:
> 0x0000000c: nop
> --------------
> IN:
> 0x0000000c: nop
>
> ... skipped ...
>
> IN:
> 0x7000a58c: bg 0x7000a588
> --------------
> IN:
> 0x7000a590: nop
> --------------
> IN:
> 0x7000a590: nop
> --------------
> IN:
> 0x7000a594: b 0x7000a570
> --------------
> IN:
> 0x7000a594: b 0x7000a570
> --------------
> IN:
> 0x7000a578: be 0x7000a59c
> --------------
> IN:
> 0x7000a580: stba %l1, [ %l0 ] #ASI_M_BYPASS
> --------------
> IN:
> 0x7000a588: deccc %l2
> --------------
> IN:
> 0x7000a594: b 0x7000a570
> --------------
> IN:
> 0x7000a590: nop
>
> ^^^^^^^^^^^ That's the end
>
> Without -singlestep it seems to work better:
>
>
> 0x7000a588: deccc %l2
> 0x7000a58c: bg 0x7000a588
> 0x7000a590: nop
>
> --------------
> IN:
> 0x7000a594: b 0x7000a570
> 0x7000a598: inc %l4
>
> --------------
> IN:
> 0x7000a570: lduba [ %l4 ] #ASI_M_KERNELTXT, %l1
> 0x7000a574: cmp %l1, 0xff
> 0x7000a578: be 0x7000a59c
> ... and so on ...

I use it for x86, mips and powerpc targets.
So pipelined CPUs work at least for some target
architectures, and sparc's singlestep is broken.

Have a look at target-mips/translate.c or
target-ppc/translate.c and compare their handling
of singlestep to the handling in target-sparc/translate.c.
The sparc variant is very simple - too simple, I assume.

Stefan