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Re: [Qemu-devel] [PATCH] resent: x86/cpuid: propagate further CPUID leaf

From: Andre Przywara
Subject: Re: [Qemu-devel] [PATCH] resent: x86/cpuid: propagate further CPUID leafs when -cpu host
Date: Wed, 26 May 2010 12:52:29 +0200
User-agent: Thunderbird (X11/20090820)

Anthony Liguori wrote:
On 05/25/2010 08:21 AM, Andre Przywara wrote:
What's the benefit of exposing this information to the guest?
That is mostly to propagate the cache size and organization parameters to the guest:
+/* safe CPUID leafs to propagate to guest if -cpu host is specified
+ * Intel defined leafs:
+ * Cache descriptors (0x02)
+ * Deterministic cache parameters (0x04)
+ * Monitor/MWAIT parameters (0x05)
+ *
+ * AMD defined leafs:
+ * L1 Cache and TLB (0x05)
+ * L2+L3 TLB (0x06)
+ * LongMode address size (0x08)
+ * 1GB page TLB (0x19)
+ * Performance optimization (0x1A)
+ */
Since at least L1 and L2 caches are mostly private to vCPUs, I see no reason to disguise them.

But in practice, what is it useful for? Just because we can expose it doesn't mean we should.
Beside the obvious high performance libraries (like the AMD ACML) also JVMs (and probably other managed code runtimes) use the cache information for optimization. Given the fact that we have a fairly large range of actual L2 cache sizes (from 256KB to 6MB on Intel) the fixed cache size that QEMU reports (1MB) is quite a bit off most of the times. -cpu host is targeted to give the best performance to the user, with the drawback of missing or very limited migration experience. So we should expose as many features as possible.


Andre Przywara
AMD-Operating System Research Center (OSRC), Dresden, Germany
Tel: +49 351 448-3567-12

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