From 93cce43be043ca25770165b8c06546eafc320716 Mon Sep 17 00:00:00 2001
From: Blue Swirl <address@hidden>
Date: Mon, 3 May 2010 19:21:59 +0000
Subject: [PATCH] Branch optimization BROKEN

Signed-off-by: Blue Swirl <address@hidden>
---
 target-sparc/translate.c |  108 +++++++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 106 insertions(+), 2 deletions(-)

diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 94c343d..57bda12 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -1115,6 +1115,104 @@ static inline void gen_cond_reg(TCGv r_dst, int cond, TCGv r_src)
 }
 #endif
 
+// Inverted logic
+static const int gen_tcg_cond[16] = {
+    -1,
+    TCG_COND_NE,
+    TCG_COND_GT,
+    TCG_COND_GE,
+    TCG_COND_GTU,
+    TCG_COND_GEU,
+    -1,
+    -1,
+    -1,
+    TCG_COND_EQ,
+    TCG_COND_LE,
+    TCG_COND_LT,
+    TCG_COND_LEU,
+    TCG_COND_LTU,
+    -1,
+    -1,
+};
+
+/* generate a conditional jump to label 'l1' according to jump opcode
+   value 'b'. In the fast case, T0 is guaranted not to be used. */
+static inline void gen_brcond(DisasContext *dc, int cond, int l1, int cc, TCGv r_cond)
+{
+    //printf("gen_brcond: cc_op %d\n", dc->cc_op);
+    switch (dc->cc_op) {
+        /* we optimize the cmp/br case */
+    case CC_OP_SUB:
+        // Inverted logic
+        switch (cond) {
+        case 0x0: // n
+            tcg_gen_br(l1);
+            break;
+        case 0x1: // e
+            if (cc == 1) {
+                tcg_gen_brcondi_i64(TCG_COND_NE, cpu_cc_dst, 0, l1);
+            } else {
+                tcg_gen_brcondi_i32(TCG_COND_NE, cpu_cc_dst, 0, l1);
+            }
+            break;
+        case 0x2: // le
+        case 0x3: // l
+        case 0x4: // leu
+        case 0x5: // cs/lu
+        case 0xa: // g
+        case 0xb: // ge
+        case 0xc: // gu
+        case 0xd: // cc/geu
+            if (cc == 1) {
+                tcg_gen_brcondi_i64(gen_tcg_cond[cond], cpu_cc_src, cpu_cc_src2, l1);
+            } else {
+                tcg_gen_brcondi_i32(gen_tcg_cond[cond], cpu_cc_src, cpu_cc_src2, l1);
+            }
+            break;
+        case 0x6: // neg
+            if (cc == 1) {
+                tcg_gen_brcondi_i64(TCG_COND_GE, cpu_cc_dst, 0, l1);
+            } else {
+                tcg_gen_brcondi_i32(TCG_COND_GE, cpu_cc_dst, 0, l1);
+            }
+            break;
+        case 0x7: // vs
+            gen_helper_compute_psr();
+            dc->cc_op = CC_OP_FLAGS;
+            gen_op_eval_bvs(cpu_cc_dst, cpu_cc_src);
+            break;
+        case 0x8: // a
+            // nop
+            break;
+        case 0x9: // ne
+            if (cc == 1) {
+                tcg_gen_brcondi_i64(TCG_COND_EQ, cpu_cc_dst, 0, l1);
+            } else {
+                tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_cc_dst, 0, l1);
+            }
+            break;
+        case 0xe: // pos
+            if (cc == 1) {
+                tcg_gen_brcondi_i64(TCG_COND_LT, cpu_cc_dst, 0, l1);
+            } else {
+                tcg_gen_brcondi_i32(TCG_COND_LT, cpu_cc_dst, 0, l1);
+            }
+            break;
+        case 0xf: // vc
+            gen_helper_compute_psr();
+            dc->cc_op = CC_OP_FLAGS;
+            gen_op_eval_bvc(cpu_cc_dst, cpu_cc_src);
+            break;
+        }
+        break;
+    case CC_OP_FLAGS:
+    default:
+        gen_cond(r_cond, cc, cond, dc);
+        tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
+        break;
+    }
+}
+
 /* XXX: potentially incorrect if dynamic npc */
 static void do_branch(DisasContext *dc, int32_t offset, uint32_t insn, int cc,
                       TCGv r_cond)
@@ -1143,11 +1241,17 @@ static void do_branch(DisasContext *dc, int32_t offset, uint32_t insn, int cc,
         }
     } else {
         flush_cond(dc, r_cond);
-        gen_cond(r_cond, cc, cond, dc);
         if (a) {
-            gen_branch_a(dc, target, dc->npc, r_cond);
+            int l1 = gen_new_label();
+
+            gen_brcond(dc, cond, l1, cc, r_cond);
+            gen_goto_tb(dc, 0, dc->npc, target);
+
+            gen_set_label(l1);
+            gen_goto_tb(dc, 1, dc->npc + 4, dc->npc + 8);
             dc->is_br = 1;
         } else {
+            gen_cond(r_cond, cc, cond, dc);
             dc->pc = dc->npc;
             dc->jump_pc[0] = target;
             dc->jump_pc[1] = dc->npc + 4;
-- 
1.5.6.5