[Qemu-devel] [PATCH v2 8/8] pci bridge: implement secondary bus reset.

[Isaku Yamahata]

implement secondary bus reset.

Signed-off-by: Isaku Yamahata <address@hidden>
---
 hw/pci_bridge.c |   13 ++++++++++++-
 1 files changed, 12 insertions(+), 1 deletions(-)

diff --git a/hw/pci_bridge.c b/hw/pci_bridge.c
index ab7ed6e..37710e9 100644
--- a/hw/pci_bridge.c
+++ b/hw/pci_bridge.c
@@ -119,6 +119,9 @@ pcibus_t pci_bridge_get_limit(const PCIDevice *bridge, 
uint8_t type)
 void pci_bridge_write_config(PCIDevice *d,
                              uint32_t address, uint32_t val, int len)
 {
+    PCIBridge *s = container_of(d, PCIBridge, dev);
+    uint16_t bridge_control = pci_get_word(d->config + PCI_BRIDGE_CONTROL);
+
     pci_default_write_config(d, address, val, len);
 
     if (/* io base/limit */
@@ -127,9 +130,17 @@ void pci_bridge_write_config(PCIDevice *d,
         /* memory base/limit, prefetchable base/limit and
            io base/limit upper 16 */
         ranges_overlap(address, len, PCI_MEMORY_BASE, 20)) {
-        PCIBridge *s = container_of(d, PCIBridge, dev);
         pci_bridge_update_mappings(&s->sec_bus);
     }
+
+    if (ranges_overlap(address, len, PCI_BRIDGE_CONTROL, 2)) {
+        uint16_t new = pci_get_word(d->config + PCI_BRIDGE_CONTROL);
+        if (!(bridge_control & PCI_BRIDGE_CTL_BUS_RESET) &&
+            (new & PCI_BRIDGE_CTL_BUS_RESET)) {
+            /* 0 -> 1 */
+            pci_bus_reset(&s->sec_bus);
+        }
+    }
 }
 
 /* reset bridge specific configuration registers */
-- 
1.7.1.1