[Qemu-devel] Re: Hitting 29 NIC limit

[Isaku Yamahata]

On Thu, Nov 18, 2010 at 09:15:19AM +0200, Michael S. Tsirkin wrote:
> On Thu, Nov 18, 2010 at 04:09:34PM +0900, Isaku Yamahata wrote:
> > On Thu, Nov 18, 2010 at 08:46:43AM +0200, Michael S. Tsirkin wrote:
> > > > What is missing for multiple pci buses is
> > > > - a new PC machine description which has multiple pci buses
> > > >   My Q35 chipset patch will provide this.
> > > 
> > > IMHO, what we really need is a way to specify bridges
> > > through qdev. Not a machine with a hard-coded buses.
> > 
> > Yes, it's long-term goal.
> > 
> > 
> > > The firmware paths used by Gleb's code might supply
> > > a good syntax to specify topology.
> > > 
> > > > - a simple P2P bridge emulator for pc architecture
> > > > - seabios support
> > > >   - DSDT for a new machine which has multi pci buses(IRQ routing)
> > > >   - pv pci bus numbering
> > > 
> > > Interesting. What's the motivation for this?
> > 
> > For hot-plugging pci-to-pci bridge. It requires sparse pci bus numbering.
> 
> Not sure I understand. pci bus numbering should be
> completely up to the guest.

Yes.


> > In fact, it's not so strong requirement.
> > Possibly I would have to dig into dsdt.
> 
> Yes, some guest-side technology like acpi might be needed.

OSes like Linux tries to keep bios settings as much as possible.
It means seabios needs to understand dsdt and initialize pci buses
properly according to it.
I think pv numbering is much easier than teaching seabios dsdt parsing.
-- 
yamahata