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[Qemu-devel] [PATCH 10/11] mainstone: convert FPGA emulation code to use
From: |
Dmitry Eremin-Solenikov |
Subject: |
[Qemu-devel] [PATCH 10/11] mainstone: convert FPGA emulation code to use QDev/SysBus |
Date: |
Mon, 31 Jan 2011 18:20:49 +0300 |
Signed-off-by: Dmitry Eremin-Solenikov <address@hidden>
---
hw/mainstone.c | 10 +++--
hw/mainstone.h | 3 --
hw/mst_fpga.c | 103 +++++++++++++++++++++++++------------------------------
3 files changed, 53 insertions(+), 63 deletions(-)
diff --git a/hw/mainstone.c b/hw/mainstone.c
index 61cac8a..7d13972 100644
--- a/hw/mainstone.c
+++ b/hw/mainstone.c
@@ -18,6 +18,7 @@
#include "sysemu.h"
#include "flash.h"
#include "blockdev.h"
+#include "sysbus.h"
static struct keymap map[0xE0] = {
[0 ... 0xDF] = { -1, -1 },
@@ -77,7 +78,7 @@ static void mainstone_common_init(ram_addr_t ram_size,
uint32_t sector_len = 256 * 1024;
target_phys_addr_t mainstone_flash_base[] = { MST_FLASH_0, MST_FLASH_1 };
PXA2xxState *cpu;
- qemu_irq *mst_irq;
+ DeviceState *mst_irq;
DriveInfo *dinfo;
int i;
int be;
@@ -117,16 +118,17 @@ static void mainstone_common_init(ram_addr_t ram_size,
}
}
- mst_irq = mst_irq_init(MST_FPGA_PHYS, qdev_get_gpio_in(cpu->pic,
PXA2XX_PIC_GPIO_0));
+ mst_irq = sysbus_create_simple("mainstone-fpga", MST_FPGA_PHYS,
+ qdev_get_gpio_in(cpu->pic, PXA2XX_PIC_GPIO_0));
/* setup keypad */
printf("map addr %p\n", &map);
pxa27x_register_keypad(cpu->kp, map, 0xe0);
/* MMC/SD host */
- pxa2xx_mmci_handlers(cpu->mmc, NULL, mst_irq[MMC_IRQ]);
+ pxa2xx_mmci_handlers(cpu->mmc, NULL, qdev_get_gpio_in(mst_irq, MMC_IRQ));
- smc91c111_init(&nd_table[0], MST_ETH_PHYS, mst_irq[ETHERNET_IRQ]);
+ smc91c111_init(&nd_table[0], MST_ETH_PHYS, qdev_get_gpio_in(mst_irq,
ETHERNET_IRQ));
mainstone_binfo.kernel_filename = kernel_filename;
mainstone_binfo.kernel_cmdline = kernel_cmdline;
diff --git a/hw/mainstone.h b/hw/mainstone.h
index 35329f1..e6a2b67 100644
--- a/hw/mainstone.h
+++ b/hw/mainstone.h
@@ -32,7 +32,4 @@
#define S1_STSCHG_IRQ 14
#define S1_IRQ 15
-extern qemu_irq
-*mst_irq_init(uint32_t base, qemu_irq irq);
-
#endif /* __MAINSTONE_H__ */
diff --git a/hw/mst_fpga.c b/hw/mst_fpga.c
index 3a49c84..847053f 100644
--- a/hw/mst_fpga.c
+++ b/hw/mst_fpga.c
@@ -8,8 +8,7 @@
* This code is licensed under the GNU GPL v2.
*/
#include "hw.h"
-#include "qdev.h"
-#include "mainstone.h"
+#include "sysbus.h"
/* Mainstone FPGA for extern irqs */
#define FPGA_GPIO_PIN 0
@@ -28,8 +27,9 @@
#define MST_PCMCIA1 0xe4
typedef struct mst_irq_state{
+ SysBusDevice busdev;
+
qemu_irq parent;
- qemu_irq *pins;
uint32_t prev_level;
uint32_t leddat1;
@@ -55,7 +55,7 @@ mst_fpga_update_gpio(mst_irq_state *s)
for (diff = s->prev_level ^ level; diff; diff ^= 1 << bit) {
bit = ffs(diff) - 1;
- qemu_set_irq(s->pins[bit], (level >> bit) & 1 );
+ qemu_set_irq(qdev_get_gpio_in(&s->busdev.qdev, bit), (level >>
bit) & 1 );
}
s->prev_level = level;
}
@@ -175,66 +175,57 @@ static CPUWriteMemoryFunc * const mst_fpga_writefn[] = {
mst_fpga_writeb,
};
-static void
-mst_fpga_save(QEMUFile *f, void *opaque)
-{
- struct mst_irq_state *s = (mst_irq_state *) opaque;
-
- qemu_put_be32s(f, &s->prev_level);
- qemu_put_be32s(f, &s->leddat1);
- qemu_put_be32s(f, &s->leddat2);
- qemu_put_be32s(f, &s->ledctrl);
- qemu_put_be32s(f, &s->gpswr);
- qemu_put_be32s(f, &s->mscwr1);
- qemu_put_be32s(f, &s->mscwr2);
- qemu_put_be32s(f, &s->mscwr3);
- qemu_put_be32s(f, &s->mscrd);
- qemu_put_be32s(f, &s->intmskena);
- qemu_put_be32s(f, &s->intsetclr);
- qemu_put_be32s(f, &s->pcmcia0);
- qemu_put_be32s(f, &s->pcmcia1);
-}
-
-static int
-mst_fpga_load(QEMUFile *f, void *opaque, int version_id)
-{
- mst_irq_state *s = (mst_irq_state *) opaque;
-
- qemu_get_be32s(f, &s->prev_level);
- qemu_get_be32s(f, &s->leddat1);
- qemu_get_be32s(f, &s->leddat2);
- qemu_get_be32s(f, &s->ledctrl);
- qemu_get_be32s(f, &s->gpswr);
- qemu_get_be32s(f, &s->mscwr1);
- qemu_get_be32s(f, &s->mscwr2);
- qemu_get_be32s(f, &s->mscwr3);
- qemu_get_be32s(f, &s->mscrd);
- qemu_get_be32s(f, &s->intmskena);
- qemu_get_be32s(f, &s->intsetclr);
- qemu_get_be32s(f, &s->pcmcia0);
- qemu_get_be32s(f, &s->pcmcia1);
- return 0;
-}
-
-qemu_irq *mst_irq_init(uint32_t base, qemu_irq irq)
+static int mst_fpga_init(SysBusDevice *dev)
{
mst_irq_state *s;
int iomemtype;
- qemu_irq *qi;
- s = (mst_irq_state *)
- qemu_mallocz(sizeof(mst_irq_state));
+ s = FROM_SYSBUS(mst_irq_state, dev);
- s->parent = irq;
+ sysbus_init_irq(dev, &s->parent);
/* alloc the external 16 irqs */
- qi = qemu_allocate_irqs(mst_fpga_set_irq, s, MST_NUM_IRQS);
- s->pins = qi;
+ qdev_init_gpio_in(&dev->qdev, mst_fpga_set_irq, MST_NUM_IRQS);
iomemtype = cpu_register_io_memory(mst_fpga_readfn,
mst_fpga_writefn, s, DEVICE_NATIVE_ENDIAN);
- cpu_register_physical_memory(base, 0x00100000, iomemtype);
- register_savevm(NULL, "mainstone_fpga", 0, 0, mst_fpga_save,
- mst_fpga_load, s);
- return qi;
+ sysbus_init_mmio(dev, 0x00100000, iomemtype);
+ return 0;
+}
+
+static VMStateDescription vmstate_mst_fpga_regs = {
+ .name = "mainstone_fpga",
+ .version_id = 0,
+ .minimum_version_id = 0,
+ .minimum_version_id_old = 0,
+ .fields = (VMStateField []) {
+ VMSTATE_UINT32(prev_level, mst_irq_state),
+ VMSTATE_UINT32(leddat1, mst_irq_state),
+ VMSTATE_UINT32(leddat2, mst_irq_state),
+ VMSTATE_UINT32(ledctrl, mst_irq_state),
+ VMSTATE_UINT32(gpswr, mst_irq_state),
+ VMSTATE_UINT32(mscwr1, mst_irq_state),
+ VMSTATE_UINT32(mscwr2, mst_irq_state),
+ VMSTATE_UINT32(mscwr3, mst_irq_state),
+ VMSTATE_UINT32(mscrd, mst_irq_state),
+ VMSTATE_UINT32(intmskena, mst_irq_state),
+ VMSTATE_UINT32(intsetclr, mst_irq_state),
+ VMSTATE_UINT32(pcmcia0, mst_irq_state),
+ VMSTATE_UINT32(pcmcia1, mst_irq_state),
+ VMSTATE_END_OF_LIST(),
+ },
+};
+
+static SysBusDeviceInfo mst_fpga_info = {
+ .init = mst_fpga_init,
+ .qdev.name = "mainstone-fpga",
+ .qdev.desc = "Mainstone II FPGA",
+ .qdev.size = sizeof(mst_irq_state),
+ .qdev.vmsd = &vmstate_mst_fpga_regs,
+};
+
+static void mst_fpga_register(void)
+{
+ sysbus_register_withprop(&mst_fpga_info);
}
+device_init(mst_fpga_register);
--
1.7.2.3
- [Qemu-devel] [PATCH 01/11] .gitignore: ignore vi swap files and ctags files, Dmitry Eremin-Solenikov, 2011/01/31
- [Qemu-devel] [PATCH 02/11] sysbus: print amount of irqs in dev_print, Dmitry Eremin-Solenikov, 2011/01/31
- [Qemu-devel] [PATCH 03/11] arm: drop unused irq-related part of CPUARMState, Dmitry Eremin-Solenikov, 2011/01/31
- [Qemu-devel] [PATCH 04/11] arm-pic: add one extra interrupt to support EXITTB interrupts, Dmitry Eremin-Solenikov, 2011/01/31
- [Qemu-devel] [PATCH 05/11] pxa2xx_pic: update to use qdev and arm-pic, Dmitry Eremin-Solenikov, 2011/01/31
- [Qemu-devel] [PATCH 06/11] pxa2xx_pic: fully encapsulate pic into DeviceState, Dmitry Eremin-Solenikov, 2011/01/31
- [Qemu-devel] [PATCH 07/11] tc6393xb: correct NAND isr assertion, Dmitry Eremin-Solenikov, 2011/01/31
- [Qemu-devel] [PATCH 08/11] Add scoop post_load callback that sets IRQs to loaded levels, Dmitry Eremin-Solenikov, 2011/01/31
- [Qemu-devel] [PATCH 09/11] Drop unnecessary inclusions of pxa.h header, Dmitry Eremin-Solenikov, 2011/01/31
- [Qemu-devel] [PATCH 10/11] mainstone: convert FPGA emulation code to use QDev/SysBus,
Dmitry Eremin-Solenikov <=
- [Qemu-devel] [PATCH 11/11] Merge mainstone.h header into mainstone.c, Dmitry Eremin-Solenikov, 2011/01/31