[Top][All Lists]
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH] mst_fpga: correct irq level settings
From: |
Dmitry Eremin-Solenikov |
Subject: |
[Qemu-devel] [PATCH] mst_fpga: correct irq level settings |
Date: |
Wed, 16 Feb 2011 16:22:33 +0300 |
Final corrections for IRQ levels that are set by mst_fpga:
* Don't retranslate IRQ if previously IRQ was masked.
* After setting or clearing IRQs through register, apply mask
before setting parent IRQ level.
Signed-off-by: Dmitry Eremin-Solenikov <address@hidden>
---
hw/mst_fpga.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/mst_fpga.c b/hw/mst_fpga.c
index afed2ac..407bac9 100644
--- a/hw/mst_fpga.c
+++ b/hw/mst_fpga.c
@@ -50,7 +50,7 @@ static void
mst_fpga_set_irq(void *opaque, int irq, int level)
{
mst_irq_state *s = (mst_irq_state *)opaque;
- uint32_t oldint = s->intsetclr;
+ uint32_t oldint = s->intsetclr & s->intmskena;
if (level)
s->prev_level |= 1u << irq;
@@ -139,7 +139,7 @@ mst_fpga_writeb(void *opaque, target_phys_addr_t addr,
uint32_t value)
break;
case MST_INTSETCLR: /* clear or set interrupt */
s->intsetclr = (value & 0xFEEFF);
- qemu_set_irq(s->parent, s->intsetclr);
+ qemu_set_irq(s->parent, s->intsetclr & s->intmskena);
break;
case MST_PCMCIA0:
s->pcmcia0 = value;
--
1.7.2.3
- [Qemu-devel] [PATCH] mst_fpga: correct irq level settings,
Dmitry Eremin-Solenikov <=