[Qemu-devel] when to check external interrupt request ? or what is the timing to check and arise external interrupt ?

[wang sheng]

I'm porting qemu to an new architecture. I come across some difficulty
that I can't define the timing that enable qemu's main-thread to be
interrupt and check external interrupt .

I understand the way that mips used to check external interrupt .

in qemu-system-mips ,   during do translation ,  if there is an
instruction that access CP0's Status register and Cause register,  the
"target-mips/translate.c" will add  a calling to function "
helper_interrupt_restart"  in the end of the translation_block.

But in my architecture which use "load/st" instruction to access  the
contr register in interrupt controller .  Because   I can't
distinguish the access for normal memory   and  access for  interrupt
controller's register ,  I  can't add  "interrupt_restart" function
calling in the end of translation block.

How can I do  to enable qemu have chance to check external interrupt ?