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[Qemu-devel] Re: [PATCH 25/26] Add a PAPR TCE-bypass mechanism for the p

From: David Gibson
Subject: [Qemu-devel] Re: [PATCH 25/26] Add a PAPR TCE-bypass mechanism for the pSeries machine
Date: Thu, 17 Mar 2011 13:21:44 +1100
User-agent: Mutt/1.5.20 (2009-06-14)

On Wed, Mar 16, 2011 at 05:43:55PM +0100, Alexander Graf wrote:
> On 03/16/2011 05:57 AM, David Gibson wrote:
> >From: Ben Herrenschmidt<address@hidden>
> >
> >Usually, PAPR virtual IO devices use a virtual IOMMU mechanism, TCEs,
> >to mediate all DMA transfers.  While this is necessary for some sorts of
> >operation, it can be complex to program and slow for others.
> >
> >This patch implements a mechanism for bypassing TCE translation, treating
> >"IO" addresses as plain (guest) physical memory addresses.  This has two
> >main uses:
> >  * Simple, but 64-bit aware programs like firmwares can use the VIO devices
> >without the complexity of TCE setup.
> >  * The guest OS can optionally use the TCE bypass to improve performance in
> >suitable situations.
> >
> >The mechanism used is a per-device flag which disables TCE translation.
> >The flag is toggled with some (hypervisor-implemented) RTAS methods.
> Is this an official extension used by anyone or is it your own
> invention that's not implemented in pHyp?

The latter.

David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!

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