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[Qemu-devel] Re: [PATCH v3 3/3] piix_pci: optimize set irq path
From: |
Isaku Yamahata |
Subject: |
[Qemu-devel] Re: [PATCH v3 3/3] piix_pci: optimize set irq path |
Date: |
Tue, 22 Mar 2011 09:50:37 +0900 |
User-agent: |
Mutt/1.5.19 (2009-01-05) |
On Mon, Mar 21, 2011 at 04:10:22PM +0200, Michael S. Tsirkin wrote:
> > @@ -37,8 +37,27 @@
> >
> > typedef PCIHostState I440FXState;
> >
> > +#define PIIX_NUM_PIC_IRQS 16 /* i8259 * 2 */
> > +#define PIIX_NUM_PIRQS 4ULL /* PIRQ[A-D] */
>
> I've changed this to
> ((uint64_t)PCI_NUM_PINS)
>
> Makes sense?
No. The number of pirq is independent of PCI_NUM_PINS.
For example, ich9 has 8 pirq (PIRQ[A-H]).
Probably same pin name (A-D) causes the confusion, they are irrelevant.
--
yamahata
[Qemu-devel] Re: [PATCH v3 3/3] piix_pci: optimize set irq path, Michael S. Tsirkin, 2011/03/21
[Qemu-devel] [PATCH v3 1/3] pci: add accessor function to get irq levels, Isaku Yamahata, 2011/03/19